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mb/google/fatcat: Move Finger Print Sensor (FPS) from GSPI0A to GSPI0

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This moves the FPS device from GSPI0A to GSPI0 to align with the
hardware design dated Jan'25.

The FPS device was initially placed on GSPI0A, which was incorrect. This
commit rectifies the configuration by moving it to the correct GSPI0
interface.

This change ensures that the CRFP device is correctly connected and
functions as expected.

BUG=b:377595986
TEST=Able to build and boot google/fatcat.

Change-Id: I3996f1a054204689ad733c650b6f71f1482c0b22
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86143
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Pranava Y N <pranavayn@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Subrata Banik 2025-01-24 12:23:42 +05:30
commit be8f78575c
1 changed files with 20 additions and 20 deletions
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40
src/mainboard/google/fatcat/variants/fatcat/overridetree.cb
View file

@ -108,9 +108,9 @@ chip soc/intel/pantherlake
}"
register "serial_io_gspi_mode" = "{
[PchSerialIoIndexGSPI0] = PchSerialIoDisabled,
[PchSerialIoIndexGSPI0] = PchSerialIoPci,
[PchSerialIoIndexGSPI1] = PchSerialIoDisabled,
[PchSerialIoIndexGSPI0A] = PchSerialIoPci,
[PchSerialIoIndexGSPI0A] = PchSerialIoDisabled,
}"
# Intel Common SoC Config
@ -395,24 +395,6 @@ chip soc/intel/pantherlake
end
end
device ref gspi0a on
chip drivers/spi/acpi
register "name" = ""CRFP""
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_D01_IRQ)"
register "wake" = "GPE0_DW1_01"
register "has_power_resource" = "true"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C15)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E19)"
register "enable_delay_ms" = "3"
device spi 0 on
probe FP FP_PRESENT
end
end # FPMCU
end
device ref xhci on
chip drivers/usb/acpi
device ref xhci_root_hub on
@ -850,6 +832,24 @@ chip soc/intel/pantherlake
end
end # I2C5
device ref gspi0 on
chip drivers/spi/acpi
register "name" = ""CRFP""
register "hid" = "ACPI_DT_NAMESPACE_HID"
register "uid" = "1"
register "compat_string" = ""google,cros-ec-spi""
register "irq" = "ACPI_IRQ_WAKE_LEVEL_LOW(GPP_D01_IRQ)"
register "wake" = "GPE0_DW1_01"
register "has_power_resource" = "true"
register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C15)"
register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_E19)"
register "enable_delay_ms" = "3"
device spi 0 on
probe FP FP_PRESENT
end
end # FPMCU
end
device ref smbus on end
device ref npk on end
device ref hda on