diff --git a/src/soc/intel/common/acpi/ioe_clk.asl b/src/soc/intel/common/acpi/ioe_clk.asl index 9aa1aba4f5..572b293b1a 100644 --- a/src/soc/intel/common/acpi/ioe_clk.asl +++ b/src/soc/intel/common/acpi/ioe_clk.asl @@ -2,6 +2,9 @@ #define PCR_BIOS_BUFFEN 0x8080 +/* IOE PCR access */ +#include + Scope (\_SB) { /* MTL IOE CLK */ diff --git a/src/soc/intel/common/acpi/pcie_clk.asl b/src/soc/intel/common/acpi/pcie_clk.asl index b74d601a1a..f9d5132120 100644 --- a/src/soc/intel/common/acpi/pcie_clk.asl +++ b/src/soc/intel/common/acpi/pcie_clk.asl @@ -4,9 +4,33 @@ #include /* IOE clock by P2SB */ -#if CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB) - #include -#endif +#include + +/* + * CLKM (Clock Manager): Helper Method to manage clock enable/disable + * This method handles the enabling or disabling of clocks for either the + * Integrated Controller (ICLK) or the IOE Die (ECLK) based on the provided + * parameters. + * + * Arg0: Clock number + * Arg1: Clock source, IOE Die Clock (1)/Integrated Controller Clock (0) + * Arg2: Enable(1)/Disable(0) Clock + */ +Method (CLKM, 3, Serialized) { + If (LEqual (Arg1, 1)) { + If (LEqual (Arg2, 1)) { + \_SB.ECLK.CLKE (Arg0) + } Else { + \_SB.ECLK.CLKD (Arg0) + } + } Else { + If (LEqual (Arg2, 1)) { + \_SB.ICLK.CLKE (Arg0) + } Else { + \_SB.ICLK.CLKD (Arg0) + } + } +} /* * Configure PCIe ClkReq Override @@ -14,25 +38,27 @@ * Arg1: Enable(1)/Disable(0) Clock */ Method (SPCO, 2, Serialized) { -#if CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB) - If (LEqual (Arg1,1)) { - If (LGreaterEqual (Arg0, CONFIG_IOE_DIE_CLOCK_START)) { - \_SB.ECLK.CLKE (Subtract (Arg0, CONFIG_IOE_DIE_CLOCK_START)) - } Else { - \_SB.ICLK.CLKE (Arg0) - } - } Else { - If (LGreaterEqual (Arg0, CONFIG_IOE_DIE_CLOCK_START)) { - \_SB.ECLK.CLKD (Subtract (Arg0, CONFIG_IOE_DIE_CLOCK_START)) - } Else { - \_SB.ICLK.CLKD (Arg0) - } + /* Flag to indicate presence of IOE Die (1 = Present, 0 = Not Present) */ + Local0 = CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB) + /* Clock start index */ + Local1 = 0 + + /* Override clock start index if SOC_INTEL_COMMON_BLOCK_IOE_P2SB Kconfig is present. */ + If (LEqual (Local0, 1)) { + Local1 = CONFIG_IOE_DIE_CLOCK_START } -#else - If (LEqual (Arg1,1)) { - \_SB.ICLK.CLKE (Arg0) + + /* Clock number */ + Local2 = Arg0 + If (LGreaterEqual (Arg0, Local1)) { + Local2 = Subtract (Arg0, Local1) } Else { - \_SB.ICLK.CLKD (Arg0) + /* + * Override IOE die indicator if clock number is less than the IOE die clock + * start index. Refer as clock number from non-IOE die. + */ + Local0 = 0; } -#endif + + CLKM (Local2, Local0, Arg1) } diff --git a/src/soc/intel/meteorlake/acpi/southbridge.asl b/src/soc/intel/meteorlake/acpi/southbridge.asl index b205aff568..06227920a7 100644 --- a/src/soc/intel/meteorlake/acpi/southbridge.asl +++ b/src/soc/intel/meteorlake/acpi/southbridge.asl @@ -6,10 +6,6 @@ /* SoC PCR access */ #include -/* IOE PCR access */ -#if CONFIG(SOC_INTEL_COMMON_BLOCK_IOE_P2SB) -#include -#endif /* PCIE src clock control */ #include