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soc/intel/ptl: Refactoring NUM_COMx_GRP_PADS calculation

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NUM_COMx_GRP_PADS value is calculated based on COMx_GRP_PAD_END
and COMx_GRP_PAD_START values instead of using GPIO pin names.

TEST=Compiled and Verified on Wildcat Lake Simulation Platform.

Change-Id: I0c5b2ebc00f328bd4b9df4653d5339781e38fcba
Signed-off-by: Sowmya Aralguppe <sowmya.aralguppe@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87484
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Sowmya Aralguppe 2025-04-30 13:41:27 +05:30 • committed by Matt DeVillier
commit bbd8f0aef8
1 changed files with 7 additions and 12 deletions
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19
src/soc/intel/pantherlake/include/soc/gpio_soc_defs.h
View file

@ -147,7 +147,7 @@
#define COM0_GRP_PAD_START GPP_V00
#define COM0_GRP_PAD_END GPP_C23
#define NUM_COM0_GRP_PADS (GPP_C23 - GPP_V00 + 1)
#define NUM_COM0_GRP_PADS (COM0_GRP_PAD_END - COM0_GRP_PAD_START + 1)
#define NUM_COM0_GPP_PADS (NUM_GPP_V_PADS + NUM_GPP_C_PADS)
#define NUM_COM0_GROUPS 2
@ -244,7 +244,7 @@
#define COM1_GRP_PAD_START GPP_F00
#define COM1_GRP_PAD_END GPP_THC0_GSPI_CLK_LPBK
#define NUM_COM1_GRP_PADS (GPP_THC0_GSPI_CLK_LPBK - GPP_F00 + 1)
#define NUM_COM1_GRP_PADS (COM1_GRP_PAD_END - COM1_GRP_PAD_START + 1)
#define NUM_COM1_GPP_PADS (NUM_GPP_F_PADS + NUM_GPP_E_PADS)
#define NUM_COM1_GROUPS 2
@ -416,17 +416,14 @@
#if CONFIG(SOC_INTEL_WILDCATLAKE)
#define COM3_GRP_PAD_START GPP_H00
#define COM3_GRP_PAD_END GPP_VGPIO3_THC3
#define NUM_COM3_GRP_PADS (GPP_VGPIO3_THC3 - GPP_H00 + 1)
#define NUM_COM3_GPP_PADS (NUM_GPP_H_PADS + NUM_GPP_A_PADS)
#define NUM_COM3_GROUPS 3
#else
#define COM3_GRP_PAD_START GPP_EPD_ON
#define COM3_GRP_PAD_END GPP_VGPIO3_THC3
#define NUM_COM3_GRP_PADS (GPP_VGPIO3_THC3 - GPP_EPD_ON + 1)
#define NUM_COM3_GPP_PADS (NUM_GPP_H_PADS + NUM_GPP_A_PADS)
#define NUM_COM3_GROUPS 4
#endif
#define COM3_GRP_PAD_END GPP_VGPIO3_THC3
#define NUM_COM3_GRP_PADS (COM3_GRP_PAD_END - COM3_GRP_PAD_START + 1)
#define NUM_COM3_GPP_PADS (NUM_GPP_H_PADS + NUM_GPP_A_PADS)
/*
* +----------------------------+
@ -493,16 +490,14 @@
#if CONFIG(SOC_INTEL_WILDCATLAKE)
#define COM4_GRP_PAD_END GPP_DDSP_HPDALV
#define NUM_COM4_GRP_PADS (GPP_DDSP_HPDALV - GPP_S00 + 1)
#define NUM_COM4_GPP_PADS (NUM_GPP_S_PADS)
#define NUM_COM4_GROUPS 2
#else
#define COM4_GRP_PAD_END GPP_S07
#define NUM_COM4_GRP_PADS (GPP_S07 - GPP_S00 + 1)
#define NUM_COM4_GPP_PADS (GPP_S07 - GPP_S00 + 1)
#define NUM_COM4_GROUPS 1
#endif
#define NUM_COM4_GRP_PADS (COM4_GRP_PAD_END - COM4_GRP_PAD_START + 1)
/*
* +----------------------------+
* | Community 5 |
@ -631,7 +626,7 @@
#define COM5_GRP_PAD_START GPP_B00
#define COM5_GRP_PAD_END GPP_VGPIO47
#define NUM_COM5_GRP_PADS (GPP_VGPIO47 - GPP_B00 + 1)
#define NUM_COM5_GRP_PADS (COM5_GRP_PAD_END - COM5_GRP_PAD_START + 1)
#define NUM_COM5_GPP_PADS (NUM_GPP_B_PADS + NUM_GPP_D_PADS)
#define NUM_COM5_GROUPS 3