diff --git a/src/cpu/samsung/exynos5420/cpu.c b/src/cpu/samsung/exynos5420/cpu.c
index bda46de63d..decef5781d 100644
--- a/src/cpu/samsung/exynos5420/cpu.c
+++ b/src/cpu/samsung/exynos5420/cpu.c
@@ -185,33 +185,3 @@ struct chip_operations cpu_samsung_exynos5420_ops = {
 	CHIP_NAME("CPU Samsung Exynos 5420")
 	.enable_dev = enable_exynos5420_dev,
 };
-
-void exynos5420_config_l2_cache(void)
-{
-	uint32_t val;
-
-	/*
-	 * Bit    9 - L2 tag RAM setup (1 cycle)
-	 * Bits 8:6 - L2 tag RAM latency (3 cycles)
-	 * Bit    5 - L2 data RAM setup (1 cycle)
-	 * Bits 2:0 - L2 data RAM latency (3 cycles)
-	 */
-	val = (1 << 9) | (0x2 << 6) | (1 << 5) | (0x2);
-	write_l2ctlr(val);
-
-	val = read_l2actlr();
-
-	/* L2ACTLR[3]: Disable clean/evict push to external */
-	val |= (1 << 3);
-
-	/* L2ACTLR[7]: Enable hazard detect timeout for A15 */
-	val |= (1 << 7);
-
-	/* L2ACTLR[27]: Prevents stopping the L2 logic clock */
-	val |= (1 << 27);
-
-	write_l2actlr(val);
-
-	/* Read the l2 control register to force things to take effect? */
-	val = read_l2ctlr();
-}
diff --git a/src/cpu/samsung/exynos5420/cpu.h b/src/cpu/samsung/exynos5420/cpu.h
index 08f315a57d..8d3d48bda4 100644
--- a/src/cpu/samsung/exynos5420/cpu.h
+++ b/src/cpu/samsung/exynos5420/cpu.h
@@ -263,7 +263,6 @@ static inline u32 get_fb_base_kb(void)
 }
 
 /* Procedures to setup Exynos5420 CPU */
-void exynos5420_config_l2_cache(void);
 void exynos5420_config_smp(void);
 
 #endif	/* _EXYNOS5420_CPU_H */
diff --git a/src/cpu/samsung/exynos5420/smp.c b/src/cpu/samsung/exynos5420/smp.c
index 392f82d097..2a0656bcaf 100644
--- a/src/cpu/samsung/exynos5420/smp.c
+++ b/src/cpu/samsung/exynos5420/smp.c
@@ -271,7 +271,10 @@ static void power_down_core(void)
 /* Configures the CPU states shard memory page and then shutdown all cores. */
 static void configure_secondary_cores(void)
 {
-	configure_l2ctlr();
+	if (get_bits(read_midr(), 4, 12) == PART_NUMBER_CORTEX_A15) {
+		configure_l2ctlr();
+		configure_l2actlr();
+	}
 
 	/* Currently we use power_down_core as callback for each core to
 	 * shutdown itself, but it is also ok to directly set ARM_CORE*_CONFIG
diff --git a/src/mainboard/google/kirby/mainboard.c b/src/mainboard/google/kirby/mainboard.c
index 9de916f0ea..777b9c3859 100644
--- a/src/mainboard/google/kirby/mainboard.c
+++ b/src/mainboard/google/kirby/mainboard.c
@@ -325,7 +325,6 @@ static void mainboard_enable(device_t dev)
 
 	/* set up dcache and MMU */
 	/* FIXME: this should happen via resource allocator */
-	exynos5420_config_l2_cache();
 	mmu_init();
 	mmu_config_range(0, DRAM_START, DCACHE_OFF);
 	mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);
diff --git a/src/mainboard/google/pit/mainboard.c b/src/mainboard/google/pit/mainboard.c
index ffb5a8f78c..61211d172d 100644
--- a/src/mainboard/google/pit/mainboard.c
+++ b/src/mainboard/google/pit/mainboard.c
@@ -444,7 +444,6 @@ static void mainboard_enable(device_t dev)
 
 	/* set up dcache and MMU */
 	/* FIXME: this should happen via resource allocator */
-	exynos5420_config_l2_cache();
 	mmu_init();
 	mmu_config_range(0, DRAM_START, DCACHE_OFF);
 	mmu_config_range(DRAM_START, DRAM_SIZE, DCACHE_WRITEBACK);