soc/amd/common: Always use genoa SPI MMAP driver

Currently the generic x86 SPI flash mmap driver is being used when not
using DMA and when not on GENOA. It only works for ROM_SIZE of 16 MiB
or less and prevents boot when the ROM is bigger than that.

Use the genoa_poc SPI MMAP driver on all platforms by default as it
allows to use a ROM_SIZE greater than 16MiB. The newly introduced
Kconfig SOC_AMD_COMMON_BLOCK_SPI_MMAP is used for all platforms when
the SPI DMA driver is not in use.

This doesn't allow to access the whole SPI flash using the ROM2 MMIO
window, but it no longer prevents boot when the mainboard specifies
the correct SPI flash size in Kconfig.

TEST: Booted an AMD/birman+ with 64MiB ROM specified in Kconfig.
TEST: Booted on AMD/onyx with 32MiB ROM specified in Kconfig.

Change-Id: I39e33c71d27179212ddb1f5bcca4c5d4a39d47e4
Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86618
Reviewed-by: Andy Ebrahiem <ahmet.ebrahiem@9elements.com>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/soc/amd/common/block/spi/Kconfig

@@ -16,6 +16,18 @@ config SOC_AMD_COMMON_BLOCK_SPI_4DW_BURST
 	help
 	  Select this option to keep the 4 DWORD burst support enabled.
 
+config SOC_AMD_COMMON_BLOCK_SPI_MMAP
+	def_bool y
+	select X86_CUSTOM_BOOTMEDIA
+	depends on SOC_AMD_COMMON_BLOCK_SPI
+	depends on !SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
+	help
+	  This option is required when CONFIG_ROM_SIZE is greater than 16 MiB.
+	  This flash driver still only mmaps 16 MiB of the flash (depending
+	  on SPI straps either the upper or lower part, by default the lower).
+	  Developers must take care to place all x86 accessible firmware
+	  components in the mmap area.
+
 config EFS_SPI_READ_MODE
 	int
 	range 0 7

src/soc/amd/common/block/spi/Makefile.mk

@@ -1,6 +1,9 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_SPI),y)
 
+all_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_SPI_MMAP) += mmap_boot.c
+smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_SPI_MMAP) += mmap_boot.c
+
 bootblock-y += fch_spi_ctrl.c
 romstage-y += fch_spi_ctrl.c
 verstage-y += fch_spi_ctrl.c

src/soc/amd/genoa_poc/Kconfig

@@ -41,6 +41,7 @@ config SOC_SPECIFIC_OPTIONS
 	select SOC_AMD_COMMON_BLOCK_SMM
 	select SOC_AMD_COMMON_BLOCK_SMU
 	select SOC_AMD_COMMON_BLOCK_SMU_SX_ENTRY
+	select SOC_AMD_COMMON_BLOCK_SPI
 	select SOC_AMD_COMMON_BLOCK_SVI3
 	select SOC_AMD_COMMON_BLOCK_TSC
 	select SOC_AMD_COMMON_BLOCK_UART
@@ -49,7 +50,6 @@ config SOC_SPECIFIC_OPTIONS
 	select SOC_AMD_OPENSIL
 	select SOC_AMD_OPENSIL_GENOA_POC
 	select OPENSIL_DRIVER
-	select X86_CUSTOM_BOOTMEDIA
 
 config USE_X86_64_SUPPORT
 	default y

src/soc/amd/genoa_poc/Makefile.mk

@@ -1,7 +1,6 @@
 ## SPDX-License-Identifier: GPL-2.0-only
 ifeq ($(CONFIG_SOC_AMD_GENOA_POC),y)
 
-all-y		+= mmap_boot.c
 all-y		+= reset.c
 all-y		+= config.c
 all-y		+= gpio.c