diff --git a/src/soc/intel/alderlake/acpi/tcss.asl b/src/soc/intel/alderlake/acpi/tcss.asl index b8b9fa4175..f184016f59 100644 --- a/src/soc/intel/alderlake/acpi/tcss.asl +++ b/src/soc/intel/alderlake/acpi/tcss.asl @@ -42,16 +42,6 @@ Scope (\_SB) { - /* Device base address */ - Method (BASE, 1) - { - Local0 = Arg0 & 0x7 /* Function number */ - Local1 = (Arg0 >> 16) & 0x1F /* Device number */ - Local2 = (Local0 << 12) + (Local1 << 15) - Local3 = \_SB.PCI0.GPCB() + Local2 - Return (Local3) - } - /* * Define PCH ACPIBASE IO as an ACPI operating region. The base address can be * found in Device 31, Function 2, Offset 40h. diff --git a/src/soc/intel/apollolake/acpi/northbridge.asl b/src/soc/intel/apollolake/acpi/northbridge.asl index fcbd1d0494..3e3f177b97 100644 --- a/src/soc/intel/apollolake/acpi/northbridge.asl +++ b/src/soc/intel/apollolake/acpi/northbridge.asl @@ -131,5 +131,15 @@ Method (GPCB, 0, Serialized) Return (Local0) } +/* Device base address */ +Method (BASE, 1) +{ + Local0 = Arg0 & 0x7 /* Function number */ + Local1 = (Arg0 >> 16) & 0x1F /* Device number */ + Local2 = (Local0 << 12) + (Local1 << 15) + Local3 = \_SB.PCI0.GPCB() + Local2 + Return (Local3) +} + /* GFX 00:02.0 */ #include diff --git a/src/soc/intel/common/block/acpi/acpi/northbridge.asl b/src/soc/intel/common/block/acpi/acpi/northbridge.asl index dd176e600a..3b2fb85933 100644 --- a/src/soc/intel/common/block/acpi/acpi/northbridge.asl +++ b/src/soc/intel/common/block/acpi/acpi/northbridge.asl @@ -277,6 +277,16 @@ Method (GDMB, 0, Serialized) Return (Local0) } +/* Device base address */ +Method (BASE, 1) +{ + Local0 = Arg0 & 0x7 /* Function number */ + Local1 = (Arg0 >> 16) & 0x1F /* Device number */ + Local2 = (Local0 << 12) + (Local1 << 15) + Local3 = \_SB.PCI0.GPCB() + Local2 + Return (Local3) +} + /* PCI Device Resource Consumption */ Device (PDRC) { diff --git a/src/soc/intel/meteorlake/acpi/tcss.asl b/src/soc/intel/meteorlake/acpi/tcss.asl index b765f0c738..27785ea5bb 100644 --- a/src/soc/intel/meteorlake/acpi/tcss.asl +++ b/src/soc/intel/meteorlake/acpi/tcss.asl @@ -42,16 +42,6 @@ Scope (\_SB) { - /* Device base address */ - Method (BASE, 1) - { - Local0 = Arg0 & 0x7 /* Function number */ - Local1 = (Arg0 >> 16) & 0x1F /* Device number */ - Local2 = (Local0 << 12) + (Local1 << 15) - Local3 = \_SB.PCI0.GPCB() + Local2 - Return (Local3) - } - /* * Define PCH ACPIBASE IO as an ACPI operating region. The base address can be * found in Device 31, Function 2, Offset 40h. diff --git a/src/soc/intel/pantherlake/acpi/tcss.asl b/src/soc/intel/pantherlake/acpi/tcss.asl index a89d26fb25..88c3ea7ba5 100644 --- a/src/soc/intel/pantherlake/acpi/tcss.asl +++ b/src/soc/intel/pantherlake/acpi/tcss.asl @@ -42,16 +42,6 @@ Scope (\_SB) { - /* Device base address */ - Method (BASE, 1) - { - Local0 = Arg0 & 0x7 /* Function number */ - Local1 = (Arg0 >> 16) & 0x1F /* Device number */ - Local2 = (Local0 << 12) + (Local1 << 15) - Local3 = \_SB.PCI0.GPCB() + Local2 - Return (Local3) - } - /* * Define PCH ACPIBASE IO as an ACPI operating region. The base address can be * found in Device 31, Function 2, Offset 40h. diff --git a/src/soc/intel/tigerlake/acpi/tcss.asl b/src/soc/intel/tigerlake/acpi/tcss.asl index d01cf250aa..56a0e55fbd 100644 --- a/src/soc/intel/tigerlake/acpi/tcss.asl +++ b/src/soc/intel/tigerlake/acpi/tcss.asl @@ -42,16 +42,6 @@ Scope (\_SB) { - /* Device base address */ - Method (BASE, 1) - { - Local0 = Arg0 & 0x7 /* Function number */ - Local1 = (Arg0 >> 16) & 0x1F /* Device number */ - Local2 = (Local0 << 12) + (Local1 << 15) - Local3 = \_SB.PCI0.GPCB() + Local2 - Return (Local3) - } - /* * Define PCH ACPIBASE IO as an ACPI operating region. The base address can be * found in Device 31, Function 2, Offset 40h.