From bae3e026627d4d9ca3daf27aae1a78fdd4f6e266 Mon Sep 17 00:00:00 2001 From: Jakub Czapiga Date: Wed, 19 Nov 2025 10:00:01 +0000 Subject: [PATCH] include: commonlib: Move memory_info and dimm_info to commonlib memory_info with dimm_info entries is available as CBMEM_ID_MEMINFO. Moving the structures definitions to the commonlib allows the payloads to easily access the memory information. BUG=b:450374306 TEST=Build and boot Google/Brya Change-Id: I25e788d5afd668e93f8ea60adaefb7b8b5d5ec28 Signed-off-by: Jakub Czapiga Reviewed-on: https://review.coreboot.org/c/coreboot/+/90119 Tested-by: build bot (Jenkins) Reviewed-by: Yu-Ping Wu --- src/commonlib/include/commonlib/memory_info.h | 126 ++++++++++++++++++ src/include/memory_info.h | 120 +---------------- 2 files changed, 127 insertions(+), 119 deletions(-) create mode 100644 src/commonlib/include/commonlib/memory_info.h diff --git a/src/commonlib/include/commonlib/memory_info.h b/src/commonlib/include/commonlib/memory_info.h new file mode 100644 index 0000000000..5465b1bccf --- /dev/null +++ b/src/commonlib/include/commonlib/memory_info.h @@ -0,0 +1,126 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _COMMONLIB_MEMORY_INFO_H_ +#define _COMMONLIB_MEMORY_INFO_H_ + +#include + +#define DIMM_INFO_SERIAL_SIZE 4 +#define DIMM_INFO_PART_NUMBER_SIZE 33 +#define DIMM_INFO_TOTAL 64 + +/** + * If this table is filled and put in CBMEM, + * then these info in CBMEM will be used to generate smbios type 17 table + * + * Values are specified according to the JEDEC SPD Standard. + */ +struct dimm_info { + /* + * Size of the module in MiB. + */ + uint32_t dimm_size; + /* + * SMBIOS (not SPD) device type. + * + * See the smbios.h smbios_memory_type enum. + */ + uint16_t ddr_type; + /* + * ddr_frequency is deprecated. + * Use max_speed_mts and configured_speed_mts instead. + */ + uint16_t ddr_frequency; + uint8_t rank_per_dimm; + /* + * Socket-ID + */ + uint8_t soc_num; + /* + * Memory-Controller-ID + */ + uint8_t ctrlr_num; + /* + * Channel-ID + */ + uint8_t channel_num; + /* + * DIMM-ID + */ + uint8_t dimm_num; + uint8_t bank_locator; + /* + * SPD serial number. + */ + uint8_t serial[DIMM_INFO_SERIAL_SIZE]; + /* + * The last byte is '\0' for the end of string + * + * Must contain only printable ASCII. + */ + uint8_t module_part_number[DIMM_INFO_PART_NUMBER_SIZE]; + /* + * SPD Manufacturer ID + */ + uint16_t mod_id; + /* + * SPD Module Type. + * + * See spd.h for valid values. + * + * e.g., SPD_RDIMM, SPD_SODIMM, SPD_MICRO_DIMM + */ + uint8_t mod_type; + /* + * SPD bus width. + * + * Bits 0 - 2 encode the primary bus width: + * 0b000 = 8 bit width + * 0b001 = 16 bit width + * 0b010 = 32 bit width + * 0b011 = 64 bit width + * + * Bits 3 - 4 encode the extension bits (ECC): + * 0b00 = 0 extension bits + * 0b01 = 8 bit of ECC + * + * e.g., + * 64 bit bus with 8 bits of ECC (72 bits total): 0b1011 + * 64 bit bus with 0 bits of ECC (64 bits total): 0b0011 + * + * See the smbios.h smbios_memory_bus_width enum. + */ + uint8_t bus_width; + /* + * Voltage Level + */ + uint16_t vdd_voltage; + /* + * Max speed in MT/s + * If the value is 0, ddr_frequency should be used instead. + */ + uint16_t max_speed_mts; + /* + * Configured speed in MT/s + * If the value is 0, ddr_frequency should be used instead. + */ + uint16_t configured_speed_mts; +} __packed; + +struct memory_info { + /* + * SMBIOS error correction type. + * See the smbios.h smbios_memory_array_ecc enum. + */ + uint8_t ecc_type; + /* Maximum capacity the DRAM controller/mainboard supports */ + uint32_t max_capacity_mib; + /* Maximum number of DIMMs the DRAM controller/mainboard supports */ + uint16_t number_of_devices; + + /* active DIMM configuration */ + uint8_t dimm_cnt; + struct dimm_info dimm[DIMM_INFO_TOTAL]; +} __packed; + +#endif /* _COMMONLIB_MEMORY_INFO_H_ */ diff --git a/src/include/memory_info.h b/src/include/memory_info.h index 74aa2a7b88..e2c0b3ae97 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -4,125 +4,7 @@ #ifndef _MEMORY_INFO_H_ #define _MEMORY_INFO_H_ -#include - -#define DIMM_INFO_SERIAL_SIZE 4 -#define DIMM_INFO_PART_NUMBER_SIZE 33 -#define DIMM_INFO_TOTAL 64 - -/** - * If this table is filled and put in CBMEM, - * then these info in CBMEM will be used to generate smbios type 17 table - * - * Values are specified according to the JEDEC SPD Standard. - */ -struct dimm_info { - /* - * Size of the module in MiB. - */ - uint32_t dimm_size; - /* - * SMBIOS (not SPD) device type. - * - * See the smbios.h smbios_memory_type enum. - */ - uint16_t ddr_type; - /* - * ddr_frequency is deprecated. - * Use max_speed_mts and configured_speed_mts instead. - */ - uint16_t ddr_frequency; - uint8_t rank_per_dimm; - /* - * Socket-ID - */ - uint8_t soc_num; - /* - * Memory-Controller-ID - */ - uint8_t ctrlr_num; - /* - * Channel-ID - */ - uint8_t channel_num; - /* - * DIMM-ID - */ - uint8_t dimm_num; - uint8_t bank_locator; - /* - * SPD serial number. - */ - uint8_t serial[DIMM_INFO_SERIAL_SIZE]; - /* - * The last byte is '\0' for the end of string - * - * Must contain only printable ASCII. - */ - uint8_t module_part_number[DIMM_INFO_PART_NUMBER_SIZE]; - /* - * SPD Manufacturer ID - */ - uint16_t mod_id; - /* - * SPD Module Type. - * - * See spd.h for valid values. - * - * e.g., SPD_RDIMM, SPD_SODIMM, SPD_MICRO_DIMM - */ - uint8_t mod_type; - /* - * SPD bus width. - * - * Bits 0 - 2 encode the primary bus width: - * 0b000 = 8 bit width - * 0b001 = 16 bit width - * 0b010 = 32 bit width - * 0b011 = 64 bit width - * - * Bits 3 - 4 encode the extension bits (ECC): - * 0b00 = 0 extension bits - * 0b01 = 8 bit of ECC - * - * e.g., - * 64 bit bus with 8 bits of ECC (72 bits total): 0b1011 - * 64 bit bus with 0 bits of ECC (64 bits total): 0b0011 - * - * See the smbios.h smbios_memory_bus_width enum. - */ - uint8_t bus_width; - /* - * Voltage Level - */ - uint16_t vdd_voltage; - /* - * Max speed in MT/s - * If the value is 0, ddr_frequency should be used instead. - */ - uint16_t max_speed_mts; - /* - * Configured speed in MT/s - * If the value is 0, ddr_frequency should be used instead. - */ - uint16_t configured_speed_mts; -} __packed; - -struct memory_info { - /* - * SMBIOS error correction type. - * See the smbios.h smbios_memory_array_ecc enum. - */ - uint8_t ecc_type; - /* Maximum capacity the DRAM controller/mainboard supports */ - uint32_t max_capacity_mib; - /* Maximum number of DIMMs the DRAM controller/mainboard supports */ - uint16_t number_of_devices; - - /* active DIMM configuration */ - uint8_t dimm_cnt; - struct dimm_info dimm[DIMM_INFO_TOTAL]; -} __packed; +#include /* * mainboard_get_dram_part_num returns a DRAM part number override string