mb/google/fatcat/var/ruby: Set ISH GP1 gpio pin to NC

Because GPP_B05 is not required for EC or ISH interrupts,
it should be set to NC in coreboot to minimize power impact.

BUG=b:475879711
TEST=Build and boot to OS.

Change-Id: Ic56e16ca89968c8e2204d1609812f1d8d3548512
Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/91427
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Derek Huang <derekhuang@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
This commit is contained in:
Luca Lai 2026-02-26 10:32:13 +08:00 committed by Matt DeVillier
commit ba6de6c866

View file

@ -55,7 +55,8 @@ static const struct pad_config gpio_table[] = {
PAD_NC(GPP_B02, NONE),
/* GPP_B03: NC */
PAD_NC(GPP_B03, NONE),
/* GPP_B05: NONE */
PAD_NC(GPP_B05, NONE),
/* GPP_B06: NC */
PAD_NC(GPP_B06, NONE),
/* GPP_B07: NC */