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mb/lenovo/t530: Remove old USB configurations

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As of commit a911b75848 ("mb/*: Remove old USB configurations from
SNB/bd82x6x boards") USB configurations are drawn exclusively from
devicetree. These stuff should have been removed then.

Drop romstage.c from both variants that only carries the old USB
configurations and xhci_overcurrent_mapping devicetree setting that is
now derived from usb_port_config (they match).

Change-Id: I1a5d57ae9e3788e0c7788013c6fe387ec83efcf2
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85943
Reviewed-by: Patrick Rudolph <patrick.rudolph@9elements.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
This commit is contained in:
Keith Hui 2025-01-11 07:13:01 -05:00 • committed by Elyes Haouas
commit b97eda4d23
4 changed files with 0 additions and 42 deletions
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1
src/mainboard/lenovo/t530/Makefile.mk
View file

@ -2,7 +2,6 @@
bootblock-y += variants/$(VARIANT_DIR)/gpio.c
romstage-y += variants/$(VARIANT_DIR)/gpio.c
romstage-y += variants/$(VARIANT_DIR)/romstage.c
ramstage-$(CONFIG_MAINBOARD_USE_LIBGFXINIT) += gma-mainboard.ads
bootblock-y += early_init.c
romstage-y += early_init.c

1
src/mainboard/lenovo/t530/devicetree.cb
View file

@ -46,7 +46,6 @@ chip northbridge/intel/sandybridge
register "xhci_switchable_ports" = "0xf"
register "superspeed_capable_ports" = "0xf"
register "xhci_overcurrent_mapping" = "0x04000201"
register "docking_supported" = "true"

20
src/mainboard/lenovo/t530/variants/t530/romstage.c
View file

@ -1,20 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <southbridge/intel/bd82x6x/pch.h>
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */
{ 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */
{ 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */
{ 1, 1, -1 }, /* P3: WWAN slot, no OC */
{ 1, 1, 2 }, /* P4: yellow USB, OC 2 */
{ 1, 0, -1 }, /* P5: ExpressCard slot, no OC */
{ 0, 0, -1 }, /* P6: empty */
{ 1, 2, -1 }, /* P7: docking, no OC */
{ 1, 0, -1 }, /* P8: smart card reader, no OC */
{ 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */
{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
{ 1, 0, -1 }, /* P11: bluetooth, no OC. */
{ 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/
{ 1, 1, -1 }, /* P13: camera, no OC */
};

20
src/mainboard/lenovo/t530/variants/w530/romstage.c
View file

@ -1,20 +0,0 @@
/* SPDX-License-Identifier: GPL-2.0-only */
#include <southbridge/intel/bd82x6x/pch.h>
const struct southbridge_usb_port mainboard_usb_ports[] = {
{ 1, 1, 0 }, /* P0: USB double port upper, USB3, OC 0 */
{ 1, 1, 1 }, /* P1: USB double port lower, USB3, (EHCI debug) OC 1 */
{ 1, 2, 3 }, /* P2: Dock, USB3, OC 3 */
{ 1, 1, -1 }, /* P3: WWAN slot, no OC */
{ 1, 1, 2 }, /* P4: yellow USB, OC 2 */
{ 1, 0, -1 }, /* P5: ExpressCard slot, no OC */
{ 1, 0, -1 }, /* P6: color sensor, no OC */
{ 1, 2, -1 }, /* P7: docking, no OC */
{ 1, 0, -1 }, /* P8: smart card reader, no OC */
{ 1, 1, 5 }, /* P9: USB port single (EHCI debug), OC 5 */
{ 1, 0, -1 }, /* P10: fingerprint reader, no OC */
{ 1, 0, -1 }, /* P11: bluetooth, no OC. */
{ 1, 3, -1 }, /* P12: wlan, no OC - disabled in vendor bios*/
{ 1, 1, -1 }, /* P13: camera, no OC */
};