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nyan: Set up the SOC and TPM reset pin.

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This pin is active low and resets the SOC and TPM. It leaves the memory alone
so that panic info can be discovered by the kernel once the reboot is
complete.

BUG=chrome-os-partner:24098
TEST=With a corresponding change in depthcharge, verified that depthcharge can
reboot the SOC using this GPIO.
BRANCH=None

Change-Id: I101dbb712c458b88213e2254fd1893a1284d1491
Signed-off-by: Gabe Black <gabeblack@google.com>
Reviewed-on: https://chromium-review.googlesource.com/177965
Reviewed-by: Julius Werner <jwerner@chromium.org>
Tested-by: Gabe Black <gabeblack@chromium.org>
Commit-Queue: Gabe Black <gabeblack@chromium.org>
This commit is contained in:
Gabe Black 2013-11-25 17:53:38 -08:00 • committed by chrome-internal-fetch
commit b81a5bd15a
1 changed files with 3 additions and 0 deletions
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3
src/mainboard/google/nyan/mainboard.c
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@ -82,6 +82,9 @@ static void setup_pinmux(void)
// EC in RW.
gpio_input_pullup(GPIO(U4));
// SOC and TPM reset GPIO, active low.
gpio_output(GPIO(I5), 1);
// SPI1 MOSI
pinmux_set_config(PINMUX_ULPI_CLK_INDEX, PINMUX_ULPI_CLK_FUNC_SPI1 |
PINMUX_PULL_UP |