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mb/siemens/mc_ehl6: Change GbE LED settings

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This patch changes the LED settings for used Marvell PHY 88E1512 driver
of PSE GbE 0 and PCH GbE on mc_ehl6 mainboard.
The interrupt functionality on Marvell PHY 88E1512 is not used in the
OS for this board. In this Phy the interrupt is multiplexed with LED[2]
Pin.

On mc_ehl6 mainboard LED Pins [0/1/2] are used.
- LED Pins [0/1] for two color LINK LED at the interface
- LED[2] for ACT LED
Driver parameters are set accordingly.

TEST=Boot into OS and check LINK and ACT LED at the related plugs at
100 and 1000 Mbit mode.

Change-Id: If7fd314034b35de67fc0b10e6be9b7578807cbff
Signed-off-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90087
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
This commit is contained in:
Uwe Poeche 2025-07-15 10:29:46 +02:00 • committed by Matt DeVillier
commit b6e7f3e005
1 changed files with 12 additions and 10 deletions
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22
src/mainboard/siemens/mc_ehl/variants/mc_ehl6/devicetree.cb
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@ -118,8 +118,6 @@ chip soc/intel/elkhartlake
register "PchTsnGbeLinkSpeed" = "Tsn_1_Gbps"
register "PchTsnGbeSgmiiEnable" = "1"
register "PseDmaOwn[0]" = "Host_Owned"
register "pch_tsn_phy_irq_edge" = "RISING_EDGE"
register "pse_tsn_phy_irq_edge[0]" = "RISING_EDGE"
# FIVR related settings
@ -206,10 +204,12 @@ chip soc/intel/elkhartlake
register "configure_leds" = "true"
# LED[0]: On - 1000 Mbps Link, Off - Else
register "led_0_ctrl" = "7"
# LED[1]: On - Link, Blink - Activity, Off - No Link
register "led_1_ctrl" = "1"
# INTn is routed to LED[2] pin
register "enable_int" = "true"
# LED[1]: On - 100 Mbps Link, Off - Else
register "led_1_ctrl" = "7"
# LED[2]: Blink - Activity, Off - No Activity
register "led_2_ctrl" = "4"
# INTn is not routed to LED[2] pin
register "enable_int" = "false"
register "downshift_cnt" = "2"
register "force_mos" = "true"
register "pmos_val" = "0xF"
@ -228,10 +228,12 @@ chip soc/intel/elkhartlake
register "configure_leds" = "true"
# LED[0]: On - 1000 Mbps Link, Off - Else
register "led_0_ctrl" = "7"
# LED[1]: On - Link, Blink - Activity, Off - No Link
register "led_1_ctrl" = "1"
# INTn is routed to LED[2] pin
register "enable_int" = "true"
# LED[1]: On - 100 Mbps Link, Off - Else
register "led_1_ctrl" = "7"
# LED[2]: Blink - Activity, Off - No Activity
register "led_2_ctrl" = "4"
# INTn is not routed to LED[2] pin
register "enable_int" = "false"
register "downshift_cnt" = "2"
device mdio 1 on # PHY address
ops m88e1512_ops