UPSTREAM: soc/intel/skylake: Implement GPIO ACPI AML generating functions

Implement GPIO ACPI AML generating functions that can be called by
coreboot drivers to generate GPIO manipulation code in AML. Following
API functions are implemented:

1. acpigen_soc_read_rx_gpio
2. acpigen_soc_get_tx_gpio
3. acpigen_soc_set_tx_gpio
4. acpigen_soc_clear_tx_gpio

In addition to the API functions above, helper functions are added to
gpio.asl to set/clear/get Tx value of GPIO.

BUG=b:62028489

Change-Id: Ie79dcb9c4b57bfe435d173310025577a947509ac
Signed-off-by: Patrick Georgi <pgeorgi@google.com>
Original-Commit-Id: a6f0b2754b
Original-Change-Id: I77e5d0decd8929a922d06b02312378f092551667
Original-Signed-off-by: Furquan Shaikh <furquan@chromium.org>
Original-Reviewed-on: https://review.coreboot.org/19828
Original-Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-on: https://chromium-review.googlesource.com/515866
Commit-Ready: Shelley Chen <shchen@chromium.org>
Tested-by: Patrick Georgi <pgeorgi@chromium.org>
Tested-by: Shelley Chen <shchen@chromium.org>
Reviewed-by: Patrick Georgi <pgeorgi@chromium.org>
This commit is contained in:
Furquan Shaikh 2017-05-23 11:53:47 -07:00 committed by chrome-bot
commit b6d2a7286a
2 changed files with 82 additions and 1 deletions

View file

@ -695,3 +695,40 @@ const char *soc_acpi_name(struct device *dev)
return NULL;
}
static int acpigen_soc_gpio_op(const char *op, unsigned int gpio_num)
{
/* op (gpio_num) */
acpigen_emit_namestring(op);
acpigen_write_integer(gpio_num);
return 0;
}
static int acpigen_soc_get_gpio_state(const char *op, unsigned int gpio_num)
{
/* Store (op (gpio_num), Local0) */
acpigen_write_store();
acpigen_soc_gpio_op(op, gpio_num);
acpigen_emit_byte(LOCAL0_OP);
return 0;
}
int acpigen_soc_read_rx_gpio(unsigned int gpio_num)
{
return acpigen_soc_get_gpio_state("\\_SB.PCI0.GRXS", gpio_num);
}
int acpigen_soc_get_tx_gpio(unsigned int gpio_num)
{
return acpigen_soc_get_gpio_state("\\_SB.PCI0.GTXS", gpio_num);
}
int acpigen_soc_set_tx_gpio(unsigned int gpio_num)
{
return acpigen_soc_gpio_op("\\_SB.PCI0.STXS", gpio_num);
}
int acpigen_soc_clear_tx_gpio(unsigned int gpio_num)
{
return acpigen_soc_gpio_op("\\_SB.PCI0.CTXS", gpio_num);
}

View file

@ -120,7 +120,7 @@ Method (GADD, 1, NotSerialized)
}
/*
* Get GPIO Value
* Get GPIO Rx Value
* Arg0 - GPIO Number
*/
Method (GRXS, 1, Serialized)
@ -134,3 +134,47 @@ Method (GRXS, 1, Serialized)
Return (Local0)
}
/*
* Get GPIO Tx Value
* Arg0 - GPIO Number
*/
Method (GTXS, 1, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
And (GPIOTXSTATE_MASK, ShiftRight (VAL0, GPIOTXSTATE_SHIFT), Local0)
Return (Local0)
}
/*
* Set GPIO Tx Value
* Arg0 - GPIO Number
*/
Method (STXS, 1, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
Or (GPIOTXSTATE_MASK, VAL0, VAL0)
}
/*
* Clear GPIO Tx Value
* Arg0 - GPIO Number
*/
Method (CTXS, 1, Serialized)
{
OperationRegion (PREG, SystemMemory, GADD (Arg0), 4)
Field (PREG, AnyAcc, NoLock, Preserve)
{
VAL0, 32
}
And (Not (GPIOTXSTATE_MASK), VAL0, VAL0)
}