From b69e66721de9f17f15b580cb7a13fbfacd7e1af4 Mon Sep 17 00:00:00 2001 From: Derek Huang Date: Tue, 9 Sep 2025 10:00:18 +0000 Subject: [PATCH] mb/google/brya: Update GPIO_PCH_WP configuration in trulo baseboard Change GPIO_PCH_WP from GPP_E3 to GPP_E12 to align with trulo reference hardware schematic. BUG=b:443677716, b:435612546 TEST=Build pujjolo and kaladin firmware and verify SPI ROM write-protect Change-Id: I935d74cb5447f45f297fe45506c14623095d7127 Signed-off-by: Derek Huang Reviewed-on: https://review.coreboot.org/c/coreboot/+/89117 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- .../brya/variants/baseboard/trulo/include/baseboard/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h index 6bfcc8169a..387784ff15 100644 --- a/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h +++ b/src/mainboard/google/brya/variants/baseboard/trulo/include/baseboard/gpio.h @@ -11,7 +11,7 @@ /* EC wake is EC_SOC_WAKE_ODL which is routed to GPP_F17 */ #define GPE_EC_WAKE GPE0_DW2_17 /* WP signal to PCH */ -#define GPIO_PCH_WP GPP_E3 +#define GPIO_PCH_WP GPP_E12 /* EC in RW or RO */ #define GPIO_EC_IN_RW GPP_F18 /* GPIO IRQ for tight timestamps, MKBP interrupts */