UPSTREAM: soc/intel/quark: Rename usb.c to ehci.c

Rename usb.c to ehci.c since it contains EHCI specific content.

TEST=Build and run on Galileo Gen2

BUG=None
BRANCH=None
TEST=None

Change-Id: Ifdb7cd937b1dffda1959b76e1c911ffd93f53cb6
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/14939
Original-Tested-by: build bot (Jenkins)
Original-Reviewed-by: Duncan Laurie <dlaurie@google.com>
Signed-off-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/347162
Commit-Ready: Furquan Shaikh <furquan@chromium.org>
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Furquan Shaikh <furquan@chromium.org>

src/soc/intel/quark/Makefile.inc

@@ -25,6 +25,7 @@ romstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
 
 ramstage-$(CONFIG_HAVE_ACPI_TABLES) += acpi.c
 ramstage-y += chip.c
+ramstage-y += ehci.c
 ramstage-y += gpio_i2c.c
 ramstage-y += memmap.c
 ramstage-y += northcluster.c
@@ -33,7 +34,6 @@ ramstage-y += reg_access.c
 ramstage-y += tsc_freq.c
 ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c
 ramstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart.c
-ramstage-y += usb.c
 
 CPPFLAGS_common += -I$(src)/soc/intel/quark
 CPPFLAGS_common += -I$(src)/soc/intel/quark/include