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nb/intel/haswell: Move SPD addresses to devicetree

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Introduce a sandybridge-style devicetree setting for SPD addresses,
and use it instead of runtime code in mb_get_spd_map() for all
haswell boards without CONFIG(HAVE_SPD_IN_CBFS) - effectively all
boards except google/slippy.

Patch also covers recently added Z97 boards using Broadwell MRC.

Also update util/autoport to match.

abuild passes for all affected boards.
autoport builds, but otherwise untested.

Change-Id: I574aec9cb6a47c8aaf275ae06c7e1fb695534b34
Signed-off-by: Keith Hui <buurin@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79025
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Keith Hui 2023-11-11 17:25:48 -05:00 • committed by Felix Held
commit b4f47e8067
42 changed files with 43 additions and 145 deletions
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10
util/autoport/lynxpoint.go
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@ -272,7 +272,6 @@ void mainboard_config_superio(void)
Add_gpl(sb)
sb.WriteString(`#include <stdint.h>
#include <northbridge/intel/haswell/haswell.h>
#include <northbridge/intel/haswell/raminit.h>
#include <southbridge/intel/lynxpoint/pch.h>
void mainboard_config_rcba(void)
@ -284,15 +283,6 @@ void mb_late_romstage_setup(void)
{
}
void mb_get_spd_map(struct spd_info *spdi)
{
/* FIXME: check this */
spdi->addresses[0] = 0x50;
spdi->addresses[1] = 0x51;
spdi->addresses[2] = 0x52;
spdi->addresses[3] = 0x53;
}
const struct usb2_port_config mainboard_usb2_ports[MAX_USB2_PORTS] = {
/* FIXME: Length and Location are computed from IOBP values, may be inaccurate */
/* Length, Enable, OCn#, Location */