From b2dfa6bc20216cef562b90dfd4766228a5d8312f Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Mon, 21 Oct 2013 12:11:17 -0500 Subject: [PATCH] baytrail boards: add BSP lapic device There's some baked in assumptions internal to coreboot that the BSP's cpu device exists in the device tree. Therefore provide one in the device tree. BUG=chrome-os-partner:22862 BRANCH=None TEST=Compiled and booted with other changes. Change-Id: I22ba10964760ee8efbc5bbd5d4ce65daf31b3839 Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/173702 --- src/mainboard/google/rambi/devicetree.cb | 4 +++- src/mainboard/intel/bayleybay/devicetree.cb | 4 +++- 2 files changed, 6 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/rambi/devicetree.cb b/src/mainboard/google/rambi/devicetree.cb index 376aab6562..c6ea97cb76 100644 --- a/src/mainboard/google/rambi/devicetree.cb +++ b/src/mainboard/google/rambi/devicetree.cb @@ -1,5 +1,7 @@ chip soc/intel/baytrail - device cpu_cluster 0 on end + device cpu_cluster 0 on + device lapic 0 on end + end device domain 0 on device pci 00.0 on end # SoC router device pci 02.0 on end # GFX diff --git a/src/mainboard/intel/bayleybay/devicetree.cb b/src/mainboard/intel/bayleybay/devicetree.cb index 376aab6562..c6ea97cb76 100644 --- a/src/mainboard/intel/bayleybay/devicetree.cb +++ b/src/mainboard/intel/bayleybay/devicetree.cb @@ -1,5 +1,7 @@ chip soc/intel/baytrail - device cpu_cluster 0 on end + device cpu_cluster 0 on + device lapic 0 on end + end device domain 0 on device pci 00.0 on end # SoC router device pci 02.0 on end # GFX