From b2a533c918d99e7bc417dc747d1158b13389139a Mon Sep 17 00:00:00 2001 From: Jeremy Compostella Date: Sat, 14 Feb 2026 00:00:08 -0800 Subject: [PATCH] soc/intel/alderlake: Switch to common global reset implementation Replace platform-specific reset.c with the common global reset implementation using CSE with PMC fallback. Changes: - Remove src/soc/intel/alderlake/reset.c - Enable SOC_INTEL_COMMON_FEATURE_GLOBAL_RESET_CSE_PMC in Kconfig - Update Makefile.mk to remove reset.c from build The global reset implementation was identical to 6 other platforms, making it an ideal candidate for consolidation. Change-Id: Iebaf5bafd5a97dde37ffc435b2ad8b6a8dcfecd0 Signed-off-by: Jeremy Compostella Reviewed-on: https://review.coreboot.org/c/coreboot/+/91209 Tested-by: build bot (Jenkins) Reviewed-by: Guvendik, Bora --- src/soc/intel/alderlake/Kconfig | 1 + src/soc/intel/alderlake/Makefile.mk | 2 -- src/soc/intel/alderlake/reset.c | 17 ----------------- 3 files changed, 1 insertion(+), 19 deletions(-) delete mode 100644 src/soc/intel/alderlake/reset.c diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig index 9198377291..91058e8ed3 100644 --- a/src/soc/intel/alderlake/Kconfig +++ b/src/soc/intel/alderlake/Kconfig @@ -86,6 +86,7 @@ config SOC_INTEL_ALDERLAKE select SOC_INTEL_COMMON_BLOCK_XHCI_ELOG select SOC_INTEL_COMMON_FEATURE select SOC_INTEL_COMMON_FEATURE_ESPI + select SOC_INTEL_COMMON_FEATURE_GLOBAL_RESET_CSE_PMC select SOC_INTEL_COMMON_FEATURE_GSPI_DEVFN select SOC_INTEL_COMMON_FEATURE_LOCKDOWN select SOC_INTEL_COMMON_FEATURE_PMUTIL diff --git a/src/soc/intel/alderlake/Makefile.mk b/src/soc/intel/alderlake/Makefile.mk index cbfa1ebda5..5ca354832d 100644 --- a/src/soc/intel/alderlake/Makefile.mk +++ b/src/soc/intel/alderlake/Makefile.mk @@ -15,7 +15,6 @@ bootblock-$(CONFIG_ALDERLAKE_CONFIGURE_DESCRIPTOR) += bootblock/update_descripto romstage-$(CONFIG_SOC_INTEL_CSE_PRE_CPU_RESET_TELEMETRY) += cse_telemetry.c romstage-y += meminit.c romstage-y += pcie_rp.c -romstage-y += reset.c ramstage-y += acpi.c ramstage-y += chip.c @@ -28,7 +27,6 @@ ramstage-y += hsphy.c ramstage-y += p2sb.c ramstage-y += pcie_rp.c ramstage-y += pmc.c -ramstage-y += reset.c ramstage-$(CONFIG_SOC_INTEL_ALDERLAKE_TCSS_USB4_SUPPORT) += retimer.c ramstage-y += systemagent.c ramstage-y += tcss.c diff --git a/src/soc/intel/alderlake/reset.c b/src/soc/intel/alderlake/reset.c deleted file mode 100644 index 3c13f6dfe5..0000000000 --- a/src/soc/intel/alderlake/reset.c +++ /dev/null @@ -1,17 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include -#include -#include -#include - -void do_global_reset(void) -{ - /* Ask CSE to do the global reset */ - if (cse_request_global_reset() == CSE_TX_RX_SUCCESS) - return; - - /* global reset if CSE fail to reset */ - pmc_global_reset_enable(1); - do_full_reset(); -}