From b2a0347cf4d475c08a10865103f8df9eb1ab03af Mon Sep 17 00:00:00 2001 From: Sean Rhodes Date: Tue, 18 Mar 2025 13:15:04 +0000 Subject: [PATCH] mb/starlabs/starbook/mtl: Remove unnecessary op The default for DQS interleaving is 0, so don't set it to 0. Change-Id: I5f828aa3a28947c2f88eaf36cc7bc8ad68812cb2 Signed-off-by: Sean Rhodes Reviewed-on: https://review.coreboot.org/c/coreboot/+/86911 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier --- src/mainboard/starlabs/starbook/variants/mtl/romstage.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c index 3e5291f86d..b593a8cf63 100644 --- a/src/mainboard/starlabs/starbook/variants/mtl/romstage.c +++ b/src/mainboard/starlabs/starbook/variants/mtl/romstage.c @@ -11,9 +11,6 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) .type = MEM_TYPE_DDR5, .ect = true, .UserBd = BOARD_TYPE_ULT_ULX, - .ddr_config = { - .dq_pins_interleaved = false, - }, .rcomp = { .resistor = 100, .targets = {70, 30, 25, 25, 25},