soc/qualcomm/x1p42100: Refactor CBMEM top address to use linker symbols

This commit refactors how the CBMEM top address is determined. Instead
of using a hardcoded value, the CBMEM top address is now starts at
offset `_dram_smem`.

Note: CBMEM region grows from top to bottom hence, starting cbmem_top
at offset `_dram_smem` won't override the SMEM reserved range.

The hardcoded value is problematic as it overrides the SMEM reserved
range and resulted into the boot halt.

The changes include:

- cbmem.c: The cbmem_top_chipset() function is updated to return the
address of the `_dram_smem` linker symbol plus its size.

This refactoring removes a magic number from the code, improving
readability, maintainability, and consistency with how other memory
regions are handled.

BUG=b:437948495
TEST=Able to ensure booting google/quenbi till kernel w/o
abrupt shutdown.

```
[DEBUG]  CBMEM:
[DEBUG]  IMD: root @ 0xff7ff000 254 entries.
[DEBUG]  IMD: root @ 0xff7fec00 62 entries.
```

Change-Id: Idb6a8a47f38d873c6ad4f0d995e77e657cc00ac0
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88780
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>

src/soc/qualcomm/x1p42100/cbmem.c

@@ -1,8 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
 #include <cbmem.h>
+#include <soc/symbols_common.h>
 
 uintptr_t cbmem_top_chipset(void)
 {
-	return (uintptr_t)4 * GiB;
+	return (uintptr_t)_dram_smem;
 }