From b2371f134de08e0e10e9fa23fb4fa31ec5b2e353 Mon Sep 17 00:00:00 2001
From: Matt DeVillier <matt.devillier@gmail.com>
Date: Mon, 17 Apr 2017 18:45:55 -0500
Subject: [PATCH] UPSTREAM: soc/baytrail: add missing USB port defs

Add device/address stub for XHCI USB port 7.
Stub data will be supplemented by board-specific info
added in subsequent commits.

BUG=none
BRANCH=none
TEST=none

Change-Id: Ifd6dec3603caf24ab9214b35253845ea38446421
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: f9c46f0ebced9e750e4df05e33ebbaa7b7073aa4
Original-Change-Id: Iae874a9ba01e9428e07cf7ff15e663365b2354a9
Original-Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Original-Reviewed-on: https://review.coreboot.org/19972
Original-Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Original-Reviewed-by: Martin Roth <martinroth@google.com>
Reviewed-on: https://chromium-review.googlesource.com/523966
---
 src/soc/intel/baytrail/acpi/xhci.asl | 1 +
 1 file changed, 1 insertion(+)

diff --git a/src/soc/intel/baytrail/acpi/xhci.asl b/src/soc/intel/baytrail/acpi/xhci.asl
index dbd34474f8..bef0b9ff2f 100644
--- a/src/soc/intel/baytrail/acpi/xhci.asl
+++ b/src/soc/intel/baytrail/acpi/xhci.asl
@@ -27,5 +27,6 @@ Device (XHCI)
 		Device (PRT2) { Name (_ADR, 2) }
 		Device (PRT3) { Name (_ADR, 3) }
 		Device (PRT4) { Name (_ADR, 4) }
+		Device (SSP1) { Name (_ADR, 7) }
 	}
 }