diff --git a/src/mainboard/google/brya/variants/pujjoniru/gpio.c b/src/mainboard/google/brya/variants/pujjoniru/gpio.c
index 60cf8f2889..6845a6e9fd 100644
--- a/src/mainboard/google/brya/variants/pujjoniru/gpio.c
+++ b/src/mainboard/google/brya/variants/pujjoniru/gpio.c
@@ -9,7 +9,7 @@
 /* Pad configuration in ramstage */
 static const struct pad_config override_gpio_table[] = {
 	/* A7  : NC ==> SLP_S0_GATE_R */
-	PAD_CFG_GPI(GPP_A7, NONE, DEEP),
+	PAD_CFG_GPO(GPP_A7, 1, DEEP),
 	/* A8  : GPP_A8 ==> NC */
 	PAD_NC_LOCK(GPP_A8, NONE, LOCK_CONFIG),
 	/* A11 : GPP_A11 ==> EN_SPK_PA */
diff --git a/src/mainboard/google/brya/variants/pujjoniru/include/variant/gpio.h b/src/mainboard/google/brya/variants/pujjoniru/include/variant/gpio.h
index 2bfb4bfdab..bed32dae6e 100644
--- a/src/mainboard/google/brya/variants/pujjoniru/include/variant/gpio.h
+++ b/src/mainboard/google/brya/variants/pujjoniru/include/variant/gpio.h
@@ -6,4 +6,11 @@
 #undef GPIO_PCH_WP
 /* WP signal to PCH */
 #define GPIO_PCH_WP		GPP_E17
+
+/* FPR feature need add SLP_S0_GATE_R to control.
+Pujjoniru reference baord did not have HAVE_SLP_S0_GATE.
+So we add a variant specific S0ix hook to fill the SSDT
+table to control FPR feature. GPP_A7 pull down when do
+suspend and pull high when resume. */
+#define SLP_S0_FP_EN	GPP_A7
 #endif
diff --git a/src/mainboard/google/brya/variants/pujjoniru/variant.c b/src/mainboard/google/brya/variants/pujjoniru/variant.c
index 37f4defe33..cc996d9bb5 100644
--- a/src/mainboard/google/brya/variants/pujjoniru/variant.c
+++ b/src/mainboard/google/brya/variants/pujjoniru/variant.c
@@ -6,6 +6,9 @@
 #include <sar.h>
 #include <soc/gpio_soc_defs.h>
 #include <intelblocks/graphics.h>
+#include <acpi/acpi.h>
+#include <acpi/acpigen.h>
+#include <variant/gpio.h>
 
 const char *get_wifi_sar_cbfs_filename(void)
 {
@@ -25,3 +28,11 @@ void variant_update_soc_chip_config(struct soc_intel_alderlake_config *config)
 		config->cnvi_bt_audio_offload = false;
 	}
 }
+
+void variant_generate_s0ix_hook(enum s0ix_entry entry)
+{
+	if (entry == S0IX_ENTRY)
+		acpigen_soc_clear_tx_gpio(SLP_S0_FP_EN);
+	else if (entry == S0IX_EXIT)
+		acpigen_soc_set_tx_gpio(SLP_S0_FP_EN);
+}