diff --git a/src/soc/intel/pantherlake/chipset_ptl.cb b/src/soc/intel/pantherlake/chipset_ptl.cb
index e19ca02080..72907656ef 100644
--- a/src/soc/intel/pantherlake/chipset_ptl.cb
+++ b/src/soc/intel/pantherlake/chipset_ptl.cb
@@ -13,7 +13,7 @@ chip soc/intel/pantherlake
 		[VR_DOMAIN_GT] = 15 * 8
 	}"
 	register "thermal_design_current[PTL_TDC_2]" = "{
-		[VR_DOMAIN_IA] = 23 * 8,
+		[VR_DOMAIN_IA] = 28 * 8,
 		[VR_DOMAIN_GT] = 23 * 8
 	}"
 	register "icc_max[PTL_SKU_1]" = "{