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falco: Add support for Samsung memory

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New SPD and update to the SPD map.  Add both a 4GB and 2GB option.

4GB = RAM_ID{1,1,0}
2GB = RAM_ID{1,1,1}

BUG=chrome-os-partner:22995
BRANCH=falco
TEST=emerge-falco chromeos-coreboot-falco

Original-Change-Id: I37318c1b5a6ee84b7c55da00d326f10fe8af6f1e
Signed-off-by: Duncan Laurie <dlaurie@chromium.org>
(cherry picked from commit 7eb5a4ef1062a34e883c3f356ab0dc00ba07910d)

Change-Id: I0f35a7f5191fefeb5910a2d28aea153516d9a11d
Reviewed-on: https://chromium-review.googlesource.com/171693
Tested-by: Duncan Laurie <dlaurie@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Duncan Laurie <dlaurie@chromium.org>
This commit is contained in:
Duncan Laurie 2013-10-02 14:43:58 -07:00 • committed by chrome-internal-fetch
commit b02fa777aa
3 changed files with 30 additions and 9 deletions
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14
src/mainboard/google/falco/Makefile.inc
View file

@ -29,12 +29,14 @@ smm-$(CONFIG_HAVE_SMI_HANDLER) += smihandler.c
SPD_BIN = $(obj)/spd.bin
# Order of names in SPD_SOURCES is important!
SPD_SOURCES = Micron_4KTF25664HZ # 4GB / CH0 + CH1
SPD_SOURCES += Hynix_HMT425S6AFR6A # 4GB / CH0 + CH1
SPD_SOURCES += Elpida_EDJ4216EFBG # 4GB / CH0 + CH1
SPD_SOURCES += Micron_4KTF25664HZ # 2GB / CH0 only
SPD_SOURCES += Hynix_HMT425S6AFR6A # 2GB / CH0 only
SPD_SOURCES += Elpida_EDJ4216EFBG # 2GB / CH0 only
SPD_SOURCES = Micron_4KTF25664HZ # 4GB / CH0 + CH1 (RAM_ID=000)
SPD_SOURCES += Hynix_HMT425S6AFR6A # 4GB / CH0 + CH1 (RAM_ID=001)
SPD_SOURCES += Elpida_EDJ4216EFBG # 4GB / CH0 + CH1 (RAM_ID=010)
SPD_SOURCES += Micron_4KTF25664HZ # 2GB / CH0 only (RAM_ID=011)
SPD_SOURCES += Hynix_HMT425S6AFR6A # 2GB / CH0 only (RAM_ID=100)
SPD_SOURCES += Elpida_EDJ4216EFBG # 2GB / CH0 only (RAM_ID=101)
SPD_SOURCES += Samsung_M471B5674QH0 # 4GB / CH0 + CH1 (RAM_ID=110)
SPD_SOURCES += Samsung_M471B5674QH0 # 2GB / CH0 only (RAM_ID=111)
SPD_DEPS := $(foreach f, $(SPD_SOURCES), src/mainboard/$(MAINBOARDDIR)/$(f).spd.hex)

17
src/mainboard/google/falco/Samsung_M471B5674QH0.spd.hex Normal file
View file

@ -0,0 +1,17 @@
# Samsung M471B5674QH0-YK0 (K4B4G1646Q)
92 12 0B 03 04 19 02 02 03 11 01 08 0A 00 FE 00
69 78 69 3C 69 11 18 81 20 08 3C 3C 01 40 83 01
00 00 00 00 00 00 00 00 00 88 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 0F 01 11 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 80 CE 01 00 00 00 00 00 00 6C F9
4D 34 37 31 42 35 36 37 34 51 48 30 2D 59 4B 30
20 20 00 00 80 CE 00 00 00 00 00 00 00 00 00 00
00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF
FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF

8
src/mainboard/google/falco/romstage.c
View file

@ -91,11 +91,13 @@ static void copy_spd(struct pei_data *peid)
if (spd_file->len < sizeof(peid->spd_data[0]))
die("Missing SPD data.");
/* Index 0-2 are 4GB config with both CH0 and CH1
* Index 3-5 are 2GB config with CH0 only
/* Index 0-2,6 are 4GB config with both CH0 and CH1
* Index 3-5,7 are 2GB config with CH0 only
*/
if (spd_index > 2)
switch (spd_index) {
case 3: case 4: case 5: case 7:
peid->dimm_channel1_disabled = 3;
}
memcpy(peid->spd_data[0],
((char*)CBFS_SUBHEADER(spd_file)) +