From afe93a61bf8cd3d9761173745edff441d9085e59 Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Wed, 4 Jan 2017 08:26:53 -0800 Subject: [PATCH] UPSTREAM: soc/intel/quark: Add the verstage files Add the files to support verstage for vboot. TEST=Build and run on Galileo Gen2 Change-Id: Ic1312c0be3b987e85f07bc5f8fe49705166d7d9e Signed-off-by: Patrick Georgi Original-Commit-Id: b8f532310719668ac3f13c4b02273bb256742163 Original-Change-Id: Icf87075012c08cf581c17d579e0763888c707265 Original-Signed-off-by: Lee Leahy Original-Reviewed-on: https://review.coreboot.org/18040 Original-Tested-by: build bot (Jenkins) Original-Reviewed-by: Paul Menzel Original-Reviewed-by: Martin Roth Reviewed-on: https://chromium-review.googlesource.com/454573 --- src/soc/intel/quark/Makefile.inc | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/src/soc/intel/quark/Makefile.inc b/src/soc/intel/quark/Makefile.inc index bd297ed8d7..1d66e6beba 100644 --- a/src/soc/intel/quark/Makefile.inc +++ b/src/soc/intel/quark/Makefile.inc @@ -25,6 +25,11 @@ bootblock-y += reg_access.c bootblock-y += tsc_freq.c bootblock-y += uart_common.c +verstage-y += i2c.c +verstage-y += reg_access.c +verstage-y += tsc_freq.c +verstage-$(CONFIG_ENABLE_BUILTIN_HSUART1) += uart_common.c + romstage-y += i2c.c romstage-y += memmap.c romstage-y += reg_access.c