mb/trulo/var/pujjolo: Update GPIOs and probe SD card to fix S0ix suspend

Now we face the suspend could not enter s0ix issue.
So according to the schematics 627075_TWL PCH GPIO_Pujjolo_1th version
_20250527.xlsx to change gpio setting and hook up the SD card reader
via fwconfig to fix the issue.

Change :
1. gpio GPP_D8(SD_CLKREQ_ODL) to native function 1
2. add probe sd card.

BUG=b:422600523
BRANCH=none
TEST=Build and boot to OS. Verify powerd_dbus_suspend could enter S0ix

Change-Id: Iaa5a653608316ca8cb1e34429d30a2ebfdf7a1e9
Signed-off-by: Luca Lai <luca.lai@lcfc.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88050
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
This commit is contained in:
Luca Lai 2025-06-11 17:00:40 +08:00 committed by Matt DeVillier
commit afbc9126f9
2 changed files with 7 additions and 2 deletions

View file

@ -130,8 +130,8 @@ static const struct pad_config override_gpio_table[] = {
PAD_CFG_GPO(GPP_D6, 1, DEEP),
/* D7 : SRCCLKREQ2# ==> WLAN_CLKREQ_ODL */
PAD_CFG_NF(GPP_D7, NONE, DEEP, NF1),
/* D8 : SRCCLKREQ3# ==> NC */
PAD_NC_LOCK(GPP_D8, NONE, LOCK_CONFIG),
/* D8 : SRCCLKREQ3# ==> SD_CLKREQ_ODL */
PAD_CFG_NF(GPP_D8, NONE, DEEP, NF1),
/* D9 : NC */
PAD_NC_LOCK(GPP_D9, NONE, LOCK_CONFIG),
/* D10 : ISH_SPI_CLK ==> GPP_D10_STRAP */

View file

@ -8,6 +8,10 @@ fw_config
option WIFI_SAR_TABLE_AX211 0
option WIFI_SAR_TABLE_AX203 1
end
field SD_CARD 22
option SD_ABSENT 0
option SD_PRESENT 1
end
end
chip soc/intel/alderlake
@ -474,6 +478,7 @@ chip soc/intel/alderlake
register "srcclk_pin" = "3"
device generic 0 on end
end
probe SD_CARD SD_PRESENT
end #PCIE7 SD card
device ref pch_espi on
chip ec/google/chromeec