diff --git a/src/mainboard/google/ocelot/Kconfig b/src/mainboard/google/ocelot/Kconfig index 8ea9de23f3..1576db3671 100644 --- a/src/mainboard/google/ocelot/Kconfig +++ b/src/mainboard/google/ocelot/Kconfig @@ -110,6 +110,7 @@ config BOARD_GOOGLE_KODKOD config BOARD_GOOGLE_MATSU select BOARD_GOOGLE_MODEL_MATSU + select EC_GOOGLE_CHROMEEC_FW_CONFIG_FROM_UFSC config BOARD_GOOGLE_OCELOT select BOARD_GOOGLE_MODEL_OCELOT diff --git a/src/mainboard/google/ocelot/variants/matsu/Makefile.mk b/src/mainboard/google/ocelot/variants/matsu/Makefile.mk index 4c33dad4db..3fdd4642c0 100644 --- a/src/mainboard/google/ocelot/variants/matsu/Makefile.mk +++ b/src/mainboard/google/ocelot/variants/matsu/Makefile.mk @@ -3,4 +3,8 @@ bootblock-y += gpio.c romstage-y += gpio.c romstage-y += memory.c +romstage-$(CONFIG_FW_CONFIG) += fw_config.c ramstage-y += gpio.c +romstage-$(CONFIG_FW_CONFIG) += variant.c +ramstage-$(CONFIG_FW_CONFIG) += variant.c +ramstage-$(CONFIG_FW_CONFIG) += fw_config.c diff --git a/src/mainboard/google/ocelot/variants/matsu/fw_config.c b/src/mainboard/google/ocelot/variants/matsu/fw_config.c new file mode 100644 index 0000000000..23c76888bd --- /dev/null +++ b/src/mainboard/google/ocelot/variants/matsu/fw_config.c @@ -0,0 +1,67 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include + +/* t: base table; o: override table */ +#define GPIO_PADBASED_OVERRIDE(t, o) gpio_padbased_override(t, o, ARRAY_SIZE(o)) +/* t: table */ +#define GPIO_CONFIGURE_PADS(t) gpio_configure_pads(t, ARRAY_SIZE(t)) + +/* Gen4 NVME: at the top M.2 slot */ +static const struct pad_config pre_mem_gen4_ssd_pwr_pads[] = { + /* GPP_H18: GEN4_SSD_PWREN */ + PAD_CFG_GPO(GPP_H18, 1, PLTRST), + /* GPP_A08: M2_GEN4_SSD_RESET_N */ + PAD_CFG_GPO(GPP_A08, 1, PLTRST), +}; + +static const struct pad_config gen4_ssd_pads[] = { + /* GPP_H18: GEN4_SSD_PWREN */ + PAD_CFG_GPO(GPP_H18, 1, PLTRST), + /* GPP_A08: M2_GEN4_SSD_RESET_N */ + PAD_CFG_GPO(GPP_A08, 1, PLTRST), + /* GPP_C12: CLKREQ3_X4_GEN4_M2_SSD_N */ + PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), +}; + +static const struct pad_config ufs_enable_pads[] = { + /* GPP_D21: GPP_D21_UFS_REFCLK */ + PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1), + /* GPP_F09: M2_UFS_RST_N */ + PAD_CFG_GPO(GPP_F09, 1, DEEP), +}; + +void fw_config_configure_pre_mem_gpio(void) +{ + if (!fw_config_is_provisioned()) { + printk(BIOS_WARNING, "FW_CONFIG is not provisioned, Exiting\n"); + return; + } + + if (fw_config_probe(FW_CONFIG(STORAGE_TYPE, STORAGE_TYPE_NVME))) { + GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads); + } else if (fw_config_probe(FW_CONFIG(STORAGE_TYPE, STORAGE_TYPE_UNKNOWN))) { + GPIO_CONFIGURE_PADS(pre_mem_gen4_ssd_pwr_pads); + } +} + +void fw_config_gpio_padbased_override(struct pad_config *padbased_table) +{ + if (!fw_config_is_provisioned()) { + printk(BIOS_WARNING, "FW_CONFIG is not provisioned, Exiting\n"); + return; + } + + if (fw_config_probe(FW_CONFIG(STORAGE_TYPE, STORAGE_TYPE_NVME))) { + GPIO_PADBASED_OVERRIDE(padbased_table, gen4_ssd_pads); + } else if (fw_config_probe(FW_CONFIG(STORAGE_TYPE, STORAGE_TYPE_UFS))) { + GPIO_PADBASED_OVERRIDE(padbased_table, ufs_enable_pads); + } else if (fw_config_probe(FW_CONFIG(STORAGE_TYPE, STORAGE_TYPE_UNKNOWN))) { + GPIO_PADBASED_OVERRIDE(padbased_table, gen4_ssd_pads); + GPIO_PADBASED_OVERRIDE(padbased_table, ufs_enable_pads); + } +} diff --git a/src/mainboard/google/ocelot/variants/matsu/gpio.c b/src/mainboard/google/ocelot/variants/matsu/gpio.c index 7bca115efd..2455a48874 100644 --- a/src/mainboard/google/ocelot/variants/matsu/gpio.c +++ b/src/mainboard/google/ocelot/variants/matsu/gpio.c @@ -29,8 +29,6 @@ static const struct pad_config gpio_table[] = { /* GPP_A06: ESPI_RST_AIC_N */ /* GPP_A06 : GPP_A06 ==> ESPI_RST_HDR configured on reset, do not touch */ - /* GPP_A08: M2_GEN4_SSD_RESET_N */ - PAD_CFG_GPO(GPP_A08, 1, PLTRST), /* GPP_A09: NC */ PAD_NC(GPP_A09, NONE), /* GPP_A10: NC */ @@ -119,8 +117,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPO(GPP_C10, 1, DEEP), /* GPP_C11: NC */ PAD_NC(GPP_C11, NONE), - /* GPP_C12: CLKREQ3_X4_GEN4_M2_SSD_N */ - PAD_CFG_NF(GPP_C12, NONE, DEEP, NF1), /* GPP_C13: NC */ PAD_NC(GPP_C13, NONE), /* GPP_C14: NC */ @@ -171,8 +167,6 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NF(GPP_D17, NONE, DEEP, NF3), /* GPP_D19: TCHSCR_RPT_EN */ PAD_CFG_GPO(GPP_D19, 0, PLTRST), - /* GPP_D21: GPP_D21_UFS_REFCLK */ - PAD_CFG_NF(GPP_D21, NONE, DEEP, NF1), /* GPP_E */ /* GPP_E01: NC */ @@ -237,8 +231,6 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_F07, NONE), /* GPP_F08: TCHSCR_PNL1_PWR_EN */ PAD_CFG_GPO(GPP_F08, 1, PLTRST), - /* GPP_F09: M2_UFS_RST_N */ - PAD_CFG_GPO(GPP_F09, 1, DEEP), /* GPP_F10: ISH_ACCEL_MB_INT_L*/ PAD_CFG_NF(GPP_F10, NONE, DEEP, NF8), /* GPP_F11: NC */ @@ -299,8 +291,6 @@ static const struct pad_config gpio_table[] = { PAD_NC(GPP_H15, NONE), /* GPP_H17: NC */ PAD_NC(GPP_H17, NONE), - /* GPP_H18: GEN4_SSD_PWREN */ - PAD_CFG_GPO(GPP_H18, 1, DEEP), /* GPP_H19: NC */ PAD_NC(GPP_H19, NONE), /* GPP_H20: NC */ @@ -384,10 +374,6 @@ static const struct pad_config early_gpio_table[] = { /* Pad configuration in romstage */ static const struct pad_config romstage_gpio_table[] = { - /* GPP_H18: GEN4_SSD_PWREN */ - PAD_CFG_GPO(GPP_H18, 1, PLTRST), - /* GPP_A08: M2_GEN4_SSD_RESET_N */ - PAD_CFG_GPO(GPP_A08, 1, PLTRST), }; const struct pad_config *variant_gpio_table(size_t *num) diff --git a/src/mainboard/google/ocelot/variants/matsu/overridetree.cb b/src/mainboard/google/ocelot/variants/matsu/overridetree.cb index 299c2cccc0..59d6226735 100644 --- a/src/mainboard/google/ocelot/variants/matsu/overridetree.cb +++ b/src/mainboard/google/ocelot/variants/matsu/overridetree.cb @@ -1,3 +1,44 @@ +fw_config + field AUDIO_CODEC 0 2 + option AUDIO_CODEC_UNKNOWN 0 + option AUDIO_CODEC_ALC721 1 + end + field STORAGE_TYPE 12 14 + option STORAGE_TYPE_UNKNOWN 0 + option STORAGE_TYPE_NVME 1 + option STORAGE_TYPE_UFS 2 + end + field SENSOR_HUB 23 23 + option ISH_ABSENT 0 + option ISH_PRESENT 1 + end + field FINGERPRINT_INTERFACE 24 25 + option FINGERPRINT_INTERFACE_UNKNOWN 0 + option FINGERPRINT_INTERFACE_SPI 1 + option FINGERPRINT_INTERFACE_USB 2 + end + field WIFI_INTERFACE 26 27 + option WIFI_INTERFACE_UNKNOWN 0 + option WIFI_INTERFACE_CNVI 1 + end + field FORM_FACTOR 30 31 + option FORM_FACTOR_UNKNOWN 0 + option FORM_FACTOR_CLAMSHELL 1 + option FORM_FACTOR_CONVERTIBLE 2 + end + field KB_BACKLIGHT 43 43 + option KB_BACKLIGHT_ABSENT 0 + option KB_BACKLIGHT_PRESENT 1 + end + field KEYBOARD_LAYOUT 45 47 + option KEYBOARD_LAYOUT_DEFAULT 0 + option KEYBOARD_LAYOUT_CA_FR 1 + end + field AP_OEM_2BIT_FIELD0 59 60 + option IO_BOARD_USB2A2C_HDMI 0 + option IO_BOARD_USB3C 1 + end +end chip soc/intel/pantherlake register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC_SKIP)" # Type C port - various configurations - TCP0 @@ -283,10 +324,14 @@ chip soc/intel/pantherlake end end end - #ToDo: Probe using fw_config after decision. - device ref ufs on end + device ref ufs on + probe STORAGE_TYPE STORAGE_TYPE_UFS + probe STORAGE_TYPE STORAGE_TYPE_UNKNOWN + end #ToDo: Probe using fw_config after decision. device ref pcie_rp1 on + probe STORAGE_TYPE STORAGE_TYPE_NVME + probe STORAGE_TYPE STORAGE_TYPE_UNKNOWN register "pcie_rp[PCIE_RP(1)]" = "{ .clk_src = 3, .clk_req = 3, @@ -369,8 +414,8 @@ chip soc/intel/pantherlake device i2c 0x10 on end end end # I2C5 - #ToDo: Probe using fw_config after decision. device ref hda on + probe AUDIO_CODEC AUDIO_CODEC_ALC721 chip drivers/intel/soundwire device generic 0 on chip drivers/soundwire/alc711 @@ -380,7 +425,9 @@ chip soc/intel/pantherlake register "alc711_address.part_id" = "MIPI_DEV_ID_REALTEK_ALC721" register "disable_clkstop_sm_support" = "true" # SoundWire Link 3 ID 1 - device generic 3.1 on end + device generic 3.1 on + probe AUDIO_CODEC AUDIO_CODEC_ALC721 + end end end end diff --git a/src/mainboard/google/ocelot/variants/matsu/variant.c b/src/mainboard/google/ocelot/variants/matsu/variant.c new file mode 100644 index 0000000000..4868a76435 --- /dev/null +++ b/src/mainboard/google/ocelot/variants/matsu/variant.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include +#include +#include +#include + +const char *get_wifi_sar_cbfs_filename(void) +{ + return get_wifi_sar_fw_config_filename(FW_CONFIG_FIELD(WIFI_INTERFACE)); +}