ipq8064: make timer services available

Make sure it is initialized at different stages.

BUG=chrome-os-partner:27784
TEST=manual
    . not much at this point, just verified that it compiles

Change-Id: I343e7a6648e2ca935606cd76befd204aabd93726
Signed-off-by: Vadim Bendebury <vbendeb@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/196592

src/arch/arm/armv7/bootblock_simple.c

@@ -26,6 +26,7 @@
 #include <bootblock_common.h>
 #include <cbfs.h>
 #include <console/console.h>
+#include <delay.h>
 
 void main(void)
 {
@@ -45,3 +46,8 @@ void main(void)
 	if (entry) stage_exit(entry);
 	hlt();
 }
+
+void bootblock_mainboard_init(void)
+{
+	init_timer();
+}

src/mainboard/google/storm/mainboard.c

@@ -17,11 +17,13 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
  */
 
-#include <device/device.h>
 #include <boot/coreboot_tables.h>
+#include <delay.h>
+#include <device/device.h>
 
 static void mainboard_init(device_t dev)
 {
+	init_timer();
 }
 
 static void mainboard_enable(device_t dev)

src/soc/qualcomm/ipq806x/Makefile.inc

@@ -1,10 +1,12 @@
 bootblock-y += cbfs.c
 bootblock-y += clock.c
 bootblock-y += gpio.c
+bootblock-y += timer.c
 
 romstage-y += cbfs.c
 romstage-y += clock.c
 romstage-y += gpio.c
+romstage-y += timer.c
 
 ramstage-y += cbfs.c
 ramstage-y += clock.c

src/soc/qualcomm/ipq806x/timer.c

@@ -40,7 +40,7 @@
 #define GPT_FREQ	(GPT_FREQ_KHZ * 1000)	/* 32 KHz */
 
 /**
- * timer_init - initialize timer
+ * init_timer - initialize timer
  */
 void init_timer(void)
 {