diff --git a/src/cpu/Makefile.mk b/src/cpu/Makefile.mk
index 0afe454c1e..2ab8727562 100644
--- a/src/cpu/Makefile.mk
+++ b/src/cpu/Makefile.mk
@@ -59,12 +59,7 @@ $(obj)/cpu_microcode_blob.bin: $$(wildcard $$(cpu_microcode_bins)) $(DOTCONFIG)
 
 cpu_microcode_blob.bin-file ?= $(obj)/cpu_microcode_blob.bin
 cpu_microcode_blob.bin-type := microcode
-# The AMD LPC SPI DMA controller requires source files to be 64 byte aligned.
-ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
-cpu_microcode_blob.bin-align := 64
-else
 cpu_microcode_blob.bin-align := 16
-endif
 
 ifneq ($(CONFIG_CPU_MICROCODE_CBFS_LOC),)
 cpu_microcode_blob.bin-COREBOOT-position := $(CONFIG_CPU_MICROCODE_CBFS_LOC)
diff --git a/src/include/cpu/amd/microcode.h b/src/include/cpu/amd/microcode.h
index b6b158c99a..96cac59db9 100644
--- a/src/include/cpu/amd/microcode.h
+++ b/src/include/cpu/amd/microcode.h
@@ -7,6 +7,5 @@ void amd_update_microcode_from_cbfs(void);
 void amd_load_microcode_from_cbfs(void);
 void amd_free_microcode(void);
 void amd_apply_microcode_patch(void);
-void preload_microcode(void);
 
 #endif /* CPU_AMD_MICROCODE_H */
diff --git a/src/soc/amd/common/block/cpu/update_microcode.c b/src/soc/amd/common/block/cpu/update_microcode.c
index 14c4f36b98..e80339bd5f 100644
--- a/src/soc/amd/common/block/cpu/update_microcode.c
+++ b/src/soc/amd/common/block/cpu/update_microcode.c
@@ -119,16 +119,3 @@ void amd_free_microcode(void)
 		ucode = NULL;
 	}
 }
-
-void preload_microcode(void)
-{
-	if (!CONFIG(CBFS_PRELOAD))
-		return;
-
-	char name[] = CPU_MICROCODE_BLOB_NAME;
-	uint16_t equivalent_processor_rev_id = get_equivalent_processor_rev_id();
-
-	snprintf(name, sizeof(name), CPU_MICROCODE_BLOB_FORMAT, equivalent_processor_rev_id);
-	printk(BIOS_DEBUG, "Preloading microcode %s\n", name);
-	cbfs_preload(name);
-}