ARM64 Library: Add function for reading TCR register at current EL
TCR at EL1 is 64-bit whereas at EL2 and EL3 it is 32-bit. Thus, use 64-bit variables to read / write TCR at current EL. raw_read_tcr_elx will handle it automatically by accepting / returning 32-bit / 64-bit values. BUG=chrome-os-partner:33962 BRANCH=None TEST=Compiles and boots to kernel prompt. Signed-off-by: Furquan Shaikh <furquan@google.com> Change-Id: I459914808b69318157113504a3ee7cf6c5f4d8d1 Reviewed-on: https://chromium-review.googlesource.com/231548 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: Furquan Shaikh <furquan@chromium.org> Commit-Queue: Furquan Shaikh <furquan@chromium.org>
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2 changed files with 32 additions and 0 deletions
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@ -887,6 +887,34 @@ void raw_write_tcr_el3(uint32_t tcr_el3)
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__asm__ __volatile__("msr TCR_EL3, %0\n\t" : : "r" (tcr_el3) : "memory");
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}
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/*
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* IMPORTANT: TCR_EL1 is 64-bit whereas TCR_EL2 and TCR_EL3 are 32-bit. Thus,
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* 64-bit is used to read/write for tcr_current. tcr_el2 and tcr_el3 handle them
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* with appropriate 32-bit types.
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*/
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uint64_t raw_read_tcr_current(void)
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{
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uint32_t el = get_current_el();
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return raw_read_tcr(el);
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}
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void raw_write_tcr_current(uint64_t tcr)
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{
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uint32_t el = get_current_el();
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raw_write_tcr(tcr, el);
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}
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uint64_t raw_read_tcr(uint32_t el)
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{
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SWITCH_CASE_READ(raw_read_tcr, tcr, uint64_t, el);
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}
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void raw_write_tcr(uint64_t tcr, uint32_t el)
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{
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SWITCH_CASE_WRITE(raw_write_tcr, tcr, el);
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}
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/* TTBR0 */
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uint64_t raw_read_ttbr0_el1(void)
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{
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@ -467,6 +467,10 @@ uint32_t raw_read_tcr_el2(void);
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void raw_write_tcr_el2(uint32_t tcr_el2);
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uint32_t raw_read_tcr_el3(void);
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void raw_write_tcr_el3(uint32_t tcr_el3);
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uint64_t raw_read_tcr_current(void);
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void raw_write_tcr_current(uint64_t tcr);
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uint64_t raw_read_tcr(uint32_t el);
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void raw_write_tcr(uint64_t tcr, uint32_t el);
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uint64_t raw_read_ttbr0_el1(void);
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void raw_write_ttbr0_el1(uint64_t ttbr0_el1);
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uint64_t raw_read_ttbr0_el2(void);
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