mb/system76: Add SMBIOS slot descriptions

Change-Id: Ie68207dcdaab7e8de6e1c4099fc07f5c37720edb
Signed-off-by: Tim Crawford <tcrawford@system76.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/87651
Reviewed-by: Jeremy Soller <jeremy@system76.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>

src/mainboard/system76/addw1/devicetree.cb

@@ -107,6 +107,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[10]" = "20"
 			register "PcieClkSrcClkReq[10]" = "10"
 			register "PcieRpSlotImplemented[20]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp9	on
 			# PCI Express root port #9 x4, Clock 9 (SSD1)
@@ -114,6 +115,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[9]" = "8"
 			register "PcieClkSrcClkReq[9]" = "9"
 			register "PcieRpSlotImplemented[8]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp14	on
 			# PCI Express root port #14 x1, Clock 5 (GLAN)
@@ -135,6 +137,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[6]" = "15"
 			register "PcieClkSrcClkReq[6]" = "6"
 			register "PcieRpSlotImplemented[15]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref lpc_espi	on
 			register "gen1_dec" = "0x00040069"

src/mainboard/system76/adl/variants/darp8/overridetree.cb

@@ -27,6 +27,7 @@ chip soc/intel/alderlake
 				register "srcclk_pin" = "0" # SSD2_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref tcss_xhci on
 			register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
@@ -131,6 +132,7 @@ chip soc/intel/alderlake
 				register "srcclk_pin" = "2" # WLAN_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp6 on
 			# PCIe RP#6 x1, Clock 5 (CARD)
@@ -163,6 +165,7 @@ chip soc/intel/alderlake
 			#	register "srcclk_pin" = "4" # SSD1_CLKREQ#
 			#	device generic 0 on end
 			#end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pmc hidden
 			chip drivers/intel/pmc_mux

src/mainboard/system76/adl/variants/galp6/overridetree.cb

@@ -27,6 +27,7 @@ chip soc/intel/alderlake
 				register "srcclk_pin" = "0" # SSD1_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref tcss_xhci on
 			register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
@@ -152,6 +153,7 @@ chip soc/intel/alderlake
 				register "srcclk_pin" = "2" # WLAN_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp9 on
 			# PCIe RP#9 x1, Clock 5 (CARD)

src/mainboard/system76/adl/variants/gaze17-3050/overridetree.cb

@@ -48,6 +48,7 @@ chip soc/intel/alderlake
 				.clk_req = 0,
 				.flags = PCIE_RP_LTR,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref i2c0 on
 			# Touchpad I2C bus
@@ -102,6 +103,7 @@ chip soc/intel/alderlake
 				.flags = PCIE_RP_LTR,
 				.pcie_rp_detect_timeout_ms = 50,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp9 on
 			# PCIe RP#9 x1, Clock 6 (GLAN)
@@ -118,6 +120,7 @@ chip soc/intel/alderlake
 				.clk_req = 2,
 				.flags = PCIE_RP_LTR | PCIE_RP_AER,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp11 on
 			# PCIe RP#11 x1, Clock 5 (CARD)

src/mainboard/system76/adl/variants/gaze17-3060-b/overridetree.cb

@@ -55,6 +55,7 @@ chip soc/intel/alderlake
 				.clk_req = 0,
 				.flags = PCIE_RP_LTR,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref i2c0 on
 			# Touchpad I2C bus
@@ -107,6 +108,7 @@ chip soc/intel/alderlake
 				.clk_req = 2,
 				.flags = PCIE_RP_LTR,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp6 on
 			# PCIe root port #6 x1, Clock 5 (CARD)
@@ -134,6 +136,7 @@ chip soc/intel/alderlake
 				.flags = PCIE_RP_LTR,
 				.pcie_rp_detect_timeout_ms = 50,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref gbe on end
 	end

src/mainboard/system76/adl/variants/lemp11/overridetree.cb

@@ -27,6 +27,7 @@ chip soc/intel/alderlake
 				register "srcclk_pin" = "0" # SSD0_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref tcss_xhci on
 			register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
@@ -125,6 +126,7 @@ chip soc/intel/alderlake
 				register "srcclk_pin" = "2" # WLAN_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp6 on
 			# PCIe RP#6 x1, Clock 6 (CARD)
@@ -149,6 +151,7 @@ chip soc/intel/alderlake
 			#	register "srcclk_pin" = "1" # SSD1_CLKREQ#
 			#	device generic 0 on end
 			#end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pmc hidden
 			chip drivers/intel/pmc_mux

src/mainboard/system76/adl/variants/oryp10/overridetree.cb

@@ -37,6 +37,7 @@ chip soc/intel/alderlake
 				.clk_req = 0,
 				.flags = PCIE_RP_LTR,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie4_1 on
 			# CPU PCIe RP#3 x4, Clock 4 (SSD2)
@@ -45,6 +46,7 @@ chip soc/intel/alderlake
 				.clk_req = 4,
 				.flags = PCIE_RP_LTR,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref tcss_xhci on
 			register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
@@ -150,6 +152,7 @@ chip soc/intel/alderlake
 				.clk_req = 2,
 				.flags = PCIE_RP_LTR | PCIE_RP_AER,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp6 on
 			# PCIe RP#6 x1, Clock 6 (CARD)

src/mainboard/system76/adl/variants/oryp9/overridetree.cb

@@ -37,6 +37,7 @@ chip soc/intel/alderlake
 				.clk_req = 0,
 				.flags = PCIE_RP_LTR,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie4_1 on
 			# CPU PCIe RP#3 x4, Clock 4 (SSD2)
@@ -45,6 +46,7 @@ chip soc/intel/alderlake
 				.clk_req = 4,
 				.flags = PCIE_RP_LTR,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref tcss_xhci on
 			register "tcss_ports[0]" = "TCSS_PORT_DEFAULT(OC_SKIP)"
@@ -150,6 +152,7 @@ chip soc/intel/alderlake
 				.clk_req = 2,
 				.flags = PCIE_RP_LTR | PCIE_RP_AER,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp6 on
 			# PCIe RP#6 x1, Clock 6 (CARD)

src/mainboard/system76/bonw14/devicetree.cb

@@ -116,12 +116,14 @@ chip soc/intel/cannonlake
 			register "PcieRpLtrEnable[16]" = "true"
 			register "PcieClkSrcUsage[14]" = "16"
 			register "PcieClkSrcClkReq[14]" = "14"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp21	on
 			# PCI Express root port #21 x4, Clock 15 (SSD3)
 			register "PcieRpLtrEnable[20]" = "true"
 			register "PcieClkSrcUsage[15]" = "20"
 			register "PcieClkSrcClkReq[15]" = "15"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD3)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp1	on
 			# PCI Express root port #1 x4, Clock 6 (Thunderbolt)
@@ -141,12 +143,14 @@ chip soc/intel/cannonlake
 			register "PcieRpLtrEnable[8]" = "true"
 			register "PcieClkSrcUsage[8]" = "8"
 			register "PcieClkSrcClkReq[8]" = "8"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp13	on
 			# PCI Express root port #13 x1, Clock 0 (WLAN)
 			register "PcieRpLtrEnable[12]" = "true"
 			register "PcieClkSrcUsage[0]" = "12"
 			register "PcieClkSrcClkReq[0]" = "0"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp14	on
 			# PCI Express root port #14 x1, Clock 1 (GLAN)

src/mainboard/system76/cml-u/variants/darp6/overridetree.cb

@@ -56,12 +56,14 @@ chip soc/intel/cannonlake
 			register "PcieRpLtrEnable[9]" = "false"
 			register "PcieClkSrcUsage[2]" = "9"
 			register "PcieClkSrcClkReq[2]" = "2"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp13	on
 			# PCI Express Root port #13 x4, Clock 5 (NVMe)
 			register "PcieRpLtrEnable[12]" = "true"
 			register "PcieClkSrcUsage[5]" = "12"
 			register "PcieClkSrcClkReq[5]" = "5"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref hda		on
 			register "PchHdaAudioLinkDmic0" = "1"

src/mainboard/system76/cml-u/variants/galp4/overridetree.cb

@@ -49,12 +49,14 @@ chip soc/intel/cannonlake
 			register "PcieRpLtrEnable[9]" = "false"
 			register "PcieClkSrcUsage[2]" = "9"
 			register "PcieClkSrcClkReq[2]" = "2"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp13	on
 			# PCI Express Root port #13 x4, Clock 5 (NVMe)
 			register "PcieRpLtrEnable[12]" = "true"
 			register "PcieClkSrcUsage[5]" = "12"
 			register "PcieClkSrcClkReq[5]" = "5"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref hda		on
 			register "PchHdaAudioLinkDmic0" = "1"

src/mainboard/system76/gaze15/devicetree.cb

@@ -98,6 +98,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[11]" = "20"
 			register "PcieClkSrcClkReq[11]" = "11"
 			register "PcieRpSlotImplemented[20]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp9	on
 			# PCI Express root port #9 x4, Clock 10 (SSD)
@@ -105,6 +106,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[10]" = "8"
 			register "PcieClkSrcClkReq[10]" = "10"
 			register "PcieRpSlotImplemented[8]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp14	on
 			# PCI Express root port #14 x1, Clock 6 (WLAN)
@@ -112,6 +114,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[6]" = "13"
 			register "PcieClkSrcClkReq[6]" = "6"
 			register "PcieRpSlotImplemented[13]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp15	on
 			# PCI Express root port #15 x1, Clock 5 (LAN)

src/mainboard/system76/kbl-u/devicetree.cb

@@ -155,6 +155,7 @@ chip soc/intel/skylake
 			register "PcieRpClkSrcNumber[5]" = "2"
 			register "PcieRpAdvancedErrorReporting[5]" = "1"
 			register "PcieRpLtrEnable[5]" = "true"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp9 on
 			# Root port #9 x4 (NVMe)
@@ -163,6 +164,7 @@ chip soc/intel/skylake
 			register "PcieRpClkSrcNumber[8]" = "5"
 			register "PcieRpAdvancedErrorReporting[8]" = "1"
 			register "PcieRpLtrEnable[8]" = "true"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
 		end
 		device ref lpc_espi on
 			register "serirq_mode" = "SERIRQ_CONTINUOUS"

src/mainboard/system76/mtl/variants/darp10/overridetree.cb

@@ -85,6 +85,7 @@ chip soc/intel/meteorlake
 				.clk_req = 5,
 				.flags = PCIE_RP_LTR | PCIE_RP_AER,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp10 on
 			# SSD2
@@ -94,6 +95,7 @@ chip soc/intel/meteorlake
 				.clk_req = 8,
 				.flags = PCIE_RP_LTR | PCIE_RP_AER,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp11 on
 			# SSD1
@@ -103,6 +105,7 @@ chip soc/intel/meteorlake
 				.clk_req = 7,
 				.flags = PCIE_RP_LTR | PCIE_RP_AER,
 			}"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref hda on
 			subsystemid 0x1558 0xa763

src/mainboard/system76/oryp5/devicetree.cb

@@ -110,18 +110,21 @@ chip soc/intel/cannonlake
 			register "PcieRpLtrEnable[20]" = "true"
 			register "PcieClkSrcUsage[11]" = "20"
 			register "PcieClkSrcClkReq[11]" = "11"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp9	on
 			# PCI Express root port #9 x4, Clock 12 (SSD)
 			register "PcieRpLtrEnable[8]" = "true"
 			register "PcieClkSrcUsage[12]" = "8"
 			register "PcieClkSrcClkReq[12]" = "12"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp14	on
 			# PCI Express root port #14 x1, Clock 13 (WLAN)
 			register "PcieRpLtrEnable[13]" = "true"
 			register "PcieClkSrcUsage[13]" = "13"
 			register "PcieClkSrcClkReq[13]" = "13"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp15	on
 			# PCI Express root port #15 x1, Clock 14 (GLAN)

src/mainboard/system76/oryp6/devicetree.cb

@@ -116,6 +116,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[11]" = "20"
 			register "PcieClkSrcClkReq[11]" = "11"
 			register "PcieRpSlotImplemented[20]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp9	on
 			# PCI Express root port #9 x4, Clock 12 (SSD1)
@@ -123,6 +124,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[12]" = "8"
 			register "PcieClkSrcClkReq[12]" = "12"
 			register "PcieRpSlotImplemented[8]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pcie_rp14	on
 			# PCI Express root port #14 x1, Clock 7 (GLAN)
@@ -144,6 +146,7 @@ chip soc/intel/cannonlake
 			register "PcieClkSrcUsage[6]" = "15"
 			register "PcieClkSrcClkReq[6]" = "6"
 			register "PcieRpSlotImplemented[15]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref lpc_espi	on
 			register "gen1_dec" = "0x00040069" # EC PM channel

src/mainboard/system76/tgl-h/variants/gaze16-3050/overridetree.cb

@@ -29,6 +29,7 @@ chip soc/intel/tigerlake
 			# PCIe PEG0 x4, Clock 4 (SSD2)
 			register "PcieClkSrcUsage[4]" = "0x40"
 			register "PcieClkSrcClkReq[4]" = "4"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref south_xhci on
 			register "usb2_ports" = "{
@@ -71,6 +72,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[8]" = "7"
 			register "PcieClkSrcClkReq[8]" = "8"
 			register "PcieRpSlotImplemented[7]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp9 on
 			# PCIe root port #9 x4, Clock 9 (SSD1)
@@ -78,6 +80,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[9]" = "8"
 			register "PcieClkSrcClkReq[9]" = "9"
 			register "PcieRpSlotImplemented[8]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 	end
 end

src/mainboard/system76/tgl-h/variants/gaze16-3060/overridetree.cb

@@ -29,6 +29,7 @@ chip soc/intel/tigerlake
 			# PCIe PEG0 x4, Clock 7 (SSD1)
 			register "PcieClkSrcUsage[7]" = "0x40"
 			register "PcieClkSrcClkReq[7]" = "7"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref south_xhci on
 			register "usb2_ports" = "{
@@ -71,6 +72,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[2]" = "7"
 			register "PcieClkSrcClkReq[2]" = "2"
 			register "PcieRpSlotImplemented[7]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp9 on
 			# PCIe root port #9 x4, Clock 10 (SSD2)
@@ -78,6 +80,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[10]" = "8"
 			register "PcieClkSrcClkReq[10]" = "10"
 			register "PcieRpSlotImplemented[8]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref gbe on end
 	end

src/mainboard/system76/tgl-h/variants/oryp8/overridetree.cb

@@ -36,6 +36,7 @@ chip soc/intel/tigerlake
 			# PCIe PEG0 x4, Clock 7 (SSD1)
 			register "PcieClkSrcUsage[7]" = "0x40"
 			register "PcieClkSrcClkReq[7]" = "7"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref tbt_pcie_rp0 on end # TYPEC1
 		device ref north_xhci on # TYPEC1
@@ -80,6 +81,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[2]" = "7"
 			register "PcieClkSrcClkReq[2]" = "2"
 			register "PcieRpSlotImplemented[7]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp9 on
 			# PCIe root port #9 x4, Clock 6 (SSD2)
@@ -87,6 +89,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[6]" = "8"
 			register "PcieClkSrcClkReq[6]" = "6"
 			register "PcieRpSlotImplemented[8]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref smbus on
 			chip drivers/i2c/tas5825m

src/mainboard/system76/tgl-u/variants/darp7/overridetree.cb

@@ -29,6 +29,7 @@ chip soc/intel/tigerlake
 				register "srcclk_pin" = "0" # SSD1_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref north_xhci on # J_TYPEC2
 			register "UsbTcPortEn" = "1"
@@ -165,6 +166,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[1]" = "7"
 			register "PcieClkSrcClkReq[1]" = "1"
 			register "PcieRpSlotImplemented[7]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp9 on
 			# PCIe root port #9 x4, Clock 4 (SSD0)
@@ -178,6 +180,7 @@ chip soc/intel/tigerlake
 				register "srcclk_pin" = "4"
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the

src/mainboard/system76/tgl-u/variants/galp5/overridetree.cb

@@ -29,6 +29,7 @@ chip soc/intel/tigerlake
 				register "srcclk_pin" = "0" # SSD1_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref north_xhci on # J_TYPEC2
 			register "UsbTcPortEn" = "1"
@@ -181,6 +182,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[1]" = "10"
 			register "PcieClkSrcClkReq[1]" = "1"
 			register "PcieRpSlotImplemented[10]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the

src/mainboard/system76/tgl-u/variants/lemp10/overridetree.cb

@@ -30,6 +30,7 @@ chip soc/intel/tigerlake
 				register "srcclk_pin" = "3" # SSD2_CLKREQ#
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD1)" "SlotDataBusWidth4X"
 		end
 		device ref north_xhci on # J_TYPEC1
 			register "UsbTcPortEn" = "1"
@@ -124,6 +125,7 @@ chip soc/intel/tigerlake
 			register "PcieClkSrcUsage[1]" = "2"
 			register "PcieClkSrcClkReq[1]" = "1"
 			register "PcieRpSlotImplemented[2]" = "1"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230 (J_WLAN1)" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp6 on
 			# PCIe root port #6 x1, Clock 2 (CARD)
@@ -144,6 +146,7 @@ chip soc/intel/tigerlake
 				register "srcclk_pin" = "0"
 				device generic 0 on end
 			end
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280 (J_SSD2)" "SlotDataBusWidth4X"
 		end
 		device ref pmc hidden
 			# The pmc_mux chip driver is a placeholder for the

src/mainboard/system76/whl-u/devicetree.cb

@@ -113,12 +113,14 @@ chip soc/intel/cannonlake
 			register "PcieRpLtrEnable[9]" = "false"
 			register "PcieClkSrcUsage[2]" = "9"
 			register "PcieClkSrcClkReq[2]" = "2"
+			smbios_slot_desc "SlotTypeM2Socket1_SD" "SlotLengthOther" "M.2/E 2230" "SlotDataBusWidth1X"
 		end
 		device ref pcie_rp13	on
 			# PCI Express Root port #13 x4, Clock 5 (NVMe)
 			register "PcieRpLtrEnable[12]" = "true"
 			register "PcieClkSrcUsage[5]" = "12"
 			register "PcieClkSrcClkReq[5]" = "5"
+			smbios_slot_desc "SlotTypeM2Socket3" "SlotLengthOther" "M.2/M 2280" "SlotDataBusWidth4X"
 		end
 		device ref lpc_espi	on
 			register "gen1_dec" = "0x000c0081"