diff --git a/configs/config.samus.fsp b/configs/config.samus.fsp
index e97b184b85..8e0bf99f5a 100644
--- a/configs/config.samus.fsp
+++ b/configs/config.samus.fsp
@@ -3,6 +3,8 @@ CONFIG_USE_BLOBS=y
 CONFIG_VENDOR_GOOGLE=y
 CONFIG_BOARD_GOOGLE_SAMUS=y
 CONFIG_CBFS_SIZE=0x100000
+CONFIG_HAVE_REFCODE_BLOB=y
+CONFIG_REFCODE_BLOB_FILE="/build/samus/firmware/efi.elf"
 CONFIG_CONSOLE_CBMEM=y
 
 # Enable Serial Debugging
@@ -37,6 +39,7 @@ CONFIG_FSP_RESERVED_MEM_SIZE=0x00400000
 CONFIG_HAVE_FSP_BIN=y
 CONFIG_MMCONF_BASE_ADDRESS=0xe0000000
 CONFIG_PLATFORM_USES_FSP=y
+CONFIG_HEAP_SIZE=0x00080000
 
 # CONFIG_PCI_ROM_RUN is not set
 # CONFIG_ON_DEVICE_ROM_RUN is not set
diff --git a/src/Kconfig b/src/Kconfig
index ee558098ad..834249ae49 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -299,7 +299,7 @@ config TPM
 	  If unsure, say N.
 
 config HEAP_SIZE
-	hex
+	hex "Heap size in bytes"
 	default 0x4000
 
 # Not used for the actual stack by ARM, but still needed in some src/lib/ files.
diff --git a/src/soc/intel/broadwell/chip.c b/src/soc/intel/broadwell/chip.c
index 8de02fae04..124b52a192 100644
--- a/src/soc/intel/broadwell/chip.c
+++ b/src/soc/intel/broadwell/chip.c
@@ -20,6 +20,9 @@
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+#include <fsp_util.h>
+#endif	/* CONFIG_PLATFORM_USES_FSP */
 #include <soc/pci_devs.h>
 #include <soc/ramstage.h>
 #include <soc/intel/broadwell/chip.h>
@@ -38,11 +41,27 @@ static struct device_operations pci_domain_ops = {
 
 static void cpu_bus_noop(device_t dev) { }
 
+static void broadwell_final(device_t dev)
+{
+#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
+	/* Notify FSP done device setup */
+	printk(BIOS_DEBUG,
+		"Calling FspNotify(EnumInitPhaseAfterPciEnumeration)\n");
+	fsp_notify(EnumInitPhaseAfterPciEnumeration);
+
+	printk(BIOS_DEBUG, "Calling FspNotify(EnumInitPhaseReadyToBoot)\n");
+	fsp_notify(EnumInitPhaseReadyToBoot);
+
+	printk(BIOS_DEBUG, "FspNotify Returned\n");
+#endif	/* CONFIG_PLATFORM_USES_FSP */
+}
+
 static struct device_operations cpu_bus_ops = {
 	.read_resources   = &cpu_bus_noop,
 	.set_resources    = &cpu_bus_noop,
 	.enable_resources = &cpu_bus_noop,
 	.init             = &broadwell_init_cpus,
+	.final            = &broadwell_final,
 };
 
 static void broadwell_enable(device_t dev)
diff --git a/src/soc/intel/broadwell/romstage/romstage.c b/src/soc/intel/broadwell/romstage/romstage.c
index 42468b8ea6..cf0370dbf6 100644
--- a/src/soc/intel/broadwell/romstage/romstage.c
+++ b/src/soc/intel/broadwell/romstage/romstage.c
@@ -225,14 +225,6 @@ void asmlinkage romstage_after_car(void)
 	printk(BIOS_DEBUG, "FspSiliconInit returned 0x%08x\n", status);
 #endif	/* CONFIG_PLATFORM_USES_FSP */
 
-#if IS_ENABLED(CONFIG_PLATFORM_USES_FSP)
-/* TODO: Remove this code.  Temporary code to hang after FSP TempRamInit API */
-	printk(BIOS_ERR, "Hanging in romstage_after_car!\n");
-	post_code(0x35);
-	while (1)
-		;
-#endif	/* CONFIG_PLATFORM_USES_FSP */
-
 	/* Run vboot verification if configured. */
 	vboot_verify_firmware(romstage_handoff_find_or_add());