From ad704e05008acc3ca1ddcd660a9ed505cca406a4 Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Mon, 21 Apr 2025 10:33:26 -0500 Subject: [PATCH] soc/intel/cannonlake: Hook up the VT-d setting to option API MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Hook up the VT-d setting to the option API, so it can be changed at runtime without recompilation. Change-Id: Iaddaf56563bd5916bc27d99171af48bf46127052 Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/87399 Reviewed-by: Jérémy Compostella Tested-by: build bot (Jenkins) Reviewed-by: Maxim Polyakov --- src/soc/intel/cannonlake/romstage/fsp_params.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/cannonlake/romstage/fsp_params.c b/src/soc/intel/cannonlake/romstage/fsp_params.c index 5083e577ad..74812f31bf 100644 --- a/src/soc/intel/cannonlake/romstage/fsp_params.c +++ b/src/soc/intel/cannonlake/romstage/fsp_params.c @@ -125,7 +125,7 @@ void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) m_cfg->PlatformDebugConsent = CONFIG_SOC_INTEL_COMMON_DEBUG_CONSENT; /* Configure VT-d */ - tconfig->VtdDisable = 0; + tconfig->VtdDisable = !get_uint_option("vtd", 1); /* Set HECI1 PCI BAR address */ m_cfg->Heci1BarAddress = HECI1_BASE_ADDRESS;