From ace8bb45f764f2143ff10cb3c37022810a04c146 Mon Sep 17 00:00:00 2001 From: Maxim Polyakov Date: Fri, 11 Apr 2025 09:47:52 +0300 Subject: [PATCH] superio/fintek/f81866d: Undo set config mode for HWM The hardware monitor provides access to its address space via the base address stored in LDN 0x4 at index 0x60/0x61. There is no need to set the configuration mode here, since the registers in the LDN are not programmed. Change-Id: Ic27c9eee5a58727a70fc0ebe60a643f45a418d36 Signed-off-by: Maxim Polyakov Reviewed-on: https://review.coreboot.org/c/coreboot/+/87274 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons Reviewed-by: Felix Held Reviewed-by: Paul Menzel --- src/superio/fintek/f81866d/f81866d_hwm.c | 4 ---- 1 file changed, 4 deletions(-) diff --git a/src/superio/fintek/f81866d/f81866d_hwm.c b/src/superio/fintek/f81866d/f81866d_hwm.c index 2883c02e96..9862e14ed4 100644 --- a/src/superio/fintek/f81866d/f81866d_hwm.c +++ b/src/superio/fintek/f81866d/f81866d_hwm.c @@ -48,8 +48,6 @@ void f81866d_hwm_init(struct device *dev) const struct superio_fintek_f81866d_config *reg = dev->chip_info; u16 port = res->base; - pnp_enter_conf_mode(dev); - /* Use AMD TSI */ pnp_write_hwm5_index(port, HWM_AMD_TSI_ADDR, reg->hwm_amd_tsi_addr); pnp_write_hwm5_index(port, HWM_AMD_TSI_CONTROL_REG, reg->hwm_amd_tsi_control); @@ -79,6 +77,4 @@ void f81866d_hwm_init(struct device *dev) /* Set Fan control freq */ pnp_write_hwm5_index(port, HWM_FAN3_CONTROL, reg->hwm_fan3_control); pnp_write_hwm5_index(port, HWM_FAN2_TEMP_MAP_SEL, reg->hwm_fan2_temp_map_select); - - pnp_exit_conf_mode(dev); }