mb/google/brya/var/uldrenite: Update HDA verb table

Update HDA verb table (ALC3204_RTK20250805) from Realtek.
1. Modify Pin widget 0x12 - DMIC1-2
2. Modify ALC3204 Speaker output power
3. Remove H/W AGC setting
4. Remove EQ setting

BUG=b:374203133
TEST= Chromebook approved Vendor List (AVL) qualification pass
(including output voltage, frequency, magnitude response, and
noise level during system activity)

Change-Id: Id8eab4a763bcb07b747eb50cd464c8e2b2de0b57
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/88947
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
This commit is contained in:
John Su 2025-08-26 15:05:32 +08:00 committed by Subrata Banik
commit ac5bb861d8

View file

@ -6,7 +6,7 @@ const u32 cim_verb_data[] = {
/* coreboot specific header */
0x10ec0236, // Codec Vendor ID: Realtek ALC3204
0x10280D76, // Subsystem ID
0x00000021, // Number of jacks (NID entries)
0x00000019, // Number of jacks (NID entries)
AZALIA_RESET(0x1),
/* NID 0x01, HDA Codec Subsystem ID Verb table */
@ -20,7 +20,7 @@ const u32 cim_verb_data[] = {
* AZALIA_PIN_CFG(0, 0x12, 0x90A60130),
* AZALIA_PIN_CFG(0, 0x13, 0x40000000),
*/
AZALIA_PIN_CFG(0, 0x12, 0x90a60140),
AZALIA_PIN_CFG(0, 0x12, 0x411111f0),
AZALIA_PIN_CFG(0, 0x13, 0x40000000),
AZALIA_PIN_CFG(0, 0x14, 0x90170110),
AZALIA_PIN_CFG(0, 0x18, 0x411111f0),
@ -52,22 +52,12 @@ const u32 cim_verb_data[] = {
0x02050034,
0x0204023C,
/* ALC3204 Speaker output power - 4 ohm
* 2W (+12dB gain) + Combo Jack TRS setting
* 2W + Combo Jack default setting
*/
0x02050038,
0x02043901,
0x02047901,
0x02050045,
0x02045089,
/* H/W AGC setting-1 */
0x02050016,
0x02040C50,
0x02050012,
0x0204EBC2,
/* H/W AGC setting-2 */
0x02050013,
0x0204401D,
0x02050016,
0x02044E50,
/* Zero data + EAPD to verb-control */
0x02050037,
0x0204FE15,
@ -108,36 +98,6 @@ const u32 cim_verb_data[] = {
0x020401EF,
0x0205000C,
0x020401EF,
/* EQ Bypass + EQ HPF cutoff 250Hz */
0x05350000,
0x0534201A,
0x0535001d,
0x05340800,
/* EQ-2 */
0x0535001e,
0x05340800,
0x05350003,
0x05341EF8,
/* EQ-3 */
0x05350004,
0x05340000,
0x05450000,
0x05442000,
/* EQ-4 */
0x0545001d,
0x05440800,
0x0545001e,
0x05440800,
/* EQ-5 */
0x05450003,
0x05441EF8,
0x05450004,
0x05440000,
/* EQ Update */
0x05350000,
0x0534E01A,
0x05350000,
0x0534E01A,
};
const u32 pc_beep_verbs[] = {