diff --git a/Documentation/mainboard/hp/compaq_pro_6300_series.md b/Documentation/mainboard/hp/compaq_pro_6300_series.md new file mode 100644 index 0000000000..24a30b8be7 --- /dev/null +++ b/Documentation/mainboard/hp/compaq_pro_6300_series.md @@ -0,0 +1,109 @@ +# HP Compaq Pro 6300 Series + +This page describes how to run coreboot on the HP [Compaq Pro 6300 Series] desktop. + +These come in two versions: Microtower or Small Form Factor (SFF). They share the same +mainboard (657239-001) and Maintenance and Service Guide (690362-003/c04034127). This port has +been tested on a SFF unit. + +## Working +- i3-3220 / e3-1225v2 CPUs +- SeaBIOS (version rel-1.16.3-0-ga6ed6b70) +- EDK2 (MrChromebox/2502) +- Fedora-mate with Linux kernels 6.11.4, 6.13.6; KDE neon with Linux kernel 6.8.0 / 6.11.0 +- Mixed memory configurations from single 4GB to 24GB total with 1.35v & 1.5v modules +- Integrated Ethernet +- Serial port +- PS/2 keyboard and mouse +- Integrated graphics over DisplayPort and VGA port +- libgfxinit textmode (SeaBIOS) / framebuffer (EDK2) +- discrete GPU's show boot screen using SeaBIOS / EDK2 (LOAD_OPTION_ROMS=TRUE) +- All SATA ports +- All USB2 & USB3 ports +- PCI slot (Realtek RTL8169 GbE card) +- PCIe 3.0 x16 using 2.0 8x 10Gb Intel X540-AT2 / 1.0 16x nVidia GeForce(6200 LE / GT640-2GD3) +- PCIe 2.0 x1 using 2.0 1x 2.5Gb Realtek RTL8125 +- PCIe 2.0 x1 using 1.0 1x 1Gb Intel 82574L (SeaBIOS loads option rom) +- Audio built-in speaker (plays music in OS compared to legacy bleep pc-speaker) +- Front panel audio ports (front headphone port overrides built-in speaker; only microphone + works with combo mic/headphone with TRRS plug) +- Back panel audio ports +- Sensors CPU and 4 DIMM jc42-i2c sensors +- Booting USB / SATA(HDD/DVD) +- LEDs HDD, Power(blinks on suspend) +- Shutdown, Reboot, Suspend & Wake (USB keyboard & LAN) +- Strip down Intel ME/TXE firmware and hide MEI device + +## Untested +- Parallel port + +## Not working +- Simultaneous use of discrete and integrated graphics + +## TODO + +The following things are still missing from this coreboot port: + +- Extended HWM reporting +- Advanced LED control +- Advanced power configuration in S3 + +## Flashing coreboot + +```{eval-rst} ++---------------------+------------+ +| Type | Value | ++=====================+============+ +| Socketed flash | no | ++---------------------+------------+ +| Model | MT25Q128A | ++---------------------+------------+ +| Size | 16 MiB | ++---------------------+------------+ +| In circuit flashing | yes | ++---------------------+------------+ +| Package | SOIC-16 | ++---------------------+------------+ +| Write protection | Yes | ++---------------------+------------+ +| Dual BIOS feature | No | ++---------------------+------------+ +| Internal flashing | yes | ++---------------------+------------+ +``` + +### Internal programming + +Internal flashing is possible. The SPI flash can be accessed using [flashrom], +but you have to short the FDO pins located near the rear USB3 ports on the +motherboard using a jumper to temporarily disable write protections while on the +stock firmware. Remove the jumper once coreboot is installed. + +### External programming + +External programming with an SPI adapter and [flashrom] does work, but it powers the +whole southbridge complex. You need to supply enough current through the programming adapter. + +If you want to use a SOIC Pomona test clip, you have to cut the 2nd DRAM DIMM holder, +as otherwise there's not enough space near the flash. + +## Technology + +```{eval-rst} ++------------------+--------------------------------------------------+ +| Northbridge | :doc:`../../northbridge/intel/sandybridge/index` | ++------------------+--------------------------------------------------+ +| Southbridge | bd82x6x (Q75) | ++------------------+--------------------------------------------------+ +| CPU | model_206ax | ++------------------+--------------------------------------------------+ +| SuperIO | Nuvoton NPCD379 | ++------------------+--------------------------------------------------+ +| EC | | ++------------------+--------------------------------------------------+ +| Coprocessor | Intel ME | ++------------------+--------------------------------------------------+ +``` + +[Compaq Pro 6300 Series]: https://support.hp.com/us-en/product/details/hp-compaq-pro-6300-small-form-factor-pc/model/5232884 +[flashrom]: https://flashrom.org/Flashrom diff --git a/Documentation/mainboard/index.md b/Documentation/mainboard/index.md index c66b119302..7ae0ef5644 100644 --- a/Documentation/mainboard/index.md +++ b/Documentation/mainboard/index.md @@ -140,6 +140,7 @@ GA-H61M-S2PV Compaq 8200 Elite SFF Compaq 8300 Elite SFF Compaq Elite 8300 USDT +Compaq Pro 6300 Series Microtower/SFF Pro 3x00 Series Z220 Workstation SFF ``` diff --git a/src/mainboard/hp/snb_ivb_desktops/Kconfig b/src/mainboard/hp/snb_ivb_desktops/Kconfig index c23e85477f..c51813b6f9 100644 --- a/src/mainboard/hp/snb_ivb_desktops/Kconfig +++ b/src/mainboard/hp/snb_ivb_desktops/Kconfig @@ -17,6 +17,11 @@ config BOARD_HP_SNB_IVB_DESKTOPS_COMMON select SUPERIO_NUVOTON_NPCD378 select USE_NATIVE_RAMINIT +config BOARD_HP_COMPAQ_PRO_6300 + select BOARD_HP_SNB_IVB_DESKTOPS_COMMON + select BOARD_ROMSIZE_KB_16384 + select SOUTHBRIDGE_INTEL_C216 + config BOARD_HP_COMPAQ_8200_ELITE_SFF_PC select BOARD_HP_SNB_IVB_DESKTOPS_COMMON select SOUTHBRIDGE_INTEL_BD82X6X @@ -68,6 +73,7 @@ config MAINBOARD_DIR default "hp/snb_ivb_desktops" config VARIANT_DIR + default "compaq_pro_6300" if BOARD_HP_COMPAQ_PRO_6300 default "compaq_8200_elite_sff" if BOARD_HP_COMPAQ_8200_ELITE_SFF_PC default "compaq_8200_elite_usdt" if BOARD_HP_COMPAQ_8200_ELITE_USDT default "compaq_8300_elite_sff" if BOARD_HP_COMPAQ_8300_ELITE_SFF @@ -76,6 +82,7 @@ config VARIANT_DIR default "z220_sff_workstation" if BOARD_HP_Z220_SFF_WORKSTATION config MAINBOARD_PART_NUMBER + default "HP Compaq Pro 6300 SFF/MT" if BOARD_HP_COMPAQ_PRO_6300 default "HP Compaq 8200 Elite SFF PC" if BOARD_HP_COMPAQ_8200_ELITE_SFF_PC default "HP Compaq 8200 Elite USDT" if BOARD_HP_COMPAQ_8200_ELITE_USDT default "HP Compaq 8300 Elite SFF" if BOARD_HP_COMPAQ_8300_ELITE_SFF diff --git a/src/mainboard/hp/snb_ivb_desktops/Kconfig.name b/src/mainboard/hp/snb_ivb_desktops/Kconfig.name index 2d3cf43620..ff5293cddc 100644 --- a/src/mainboard/hp/snb_ivb_desktops/Kconfig.name +++ b/src/mainboard/hp/snb_ivb_desktops/Kconfig.name @@ -1,5 +1,8 @@ ## SPDX-License-Identifier: GPL-2.0-only +config BOARD_HP_COMPAQ_PRO_6300 + bool "Compaq Pro 6300 SFF/MT" + config BOARD_HP_COMPAQ_8200_ELITE_SFF_PC bool "Compaq 8200 Elite SFF" diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/board_info.txt b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/board_info.txt new file mode 100644 index 0000000000..ff6be95d1c --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/board_info.txt @@ -0,0 +1,7 @@ +Category: desktop +Board URL: https://support.hp.com/us-en/product/details/hp-compaq-pro-6300-small-form-factor-pc/model/5232884 +ROM IC: MT25Q128A +ROM package: SOIC-16 +ROM socketed: no +Flashrom support: yes +Release year: 2012 diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/data.vbt b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/data.vbt new file mode 100644 index 0000000000..c1fd6d1e13 Binary files /dev/null and b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/data.vbt differ diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/early_init.c b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/early_init.c new file mode 100644 index 0000000000..aace18dfa8 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/early_init.c @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include +#include +#include + +#define SERIAL_DEV PNP_DEV(0x2e, NPCD378_SP2) + +void bootblock_mainboard_early_init(void) +{ + if (CONFIG(CONSOLE_SERIAL)) + nuvoton_enable_serial(SERIAL_DEV, CONFIG_TTYS0_BASE); +} diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/gma-mainboard.ads b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/gma-mainboard.ads new file mode 100644 index 0000000000..686f7d44db --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/gma-mainboard.ads @@ -0,0 +1,17 @@ +-- SPDX-License-Identifier: GPL-2.0-or-later + +with HW.GFX.GMA; +with HW.GFX.GMA.Display_Probing; + +use HW.GFX.GMA; +use HW.GFX.GMA.Display_Probing; + +private package GMA.Mainboard is + + ports : constant Port_List := + (DP2, + HDMI2, + Analog, + others => Disabled); + +end GMA.Mainboard; diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/gpio.c b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/gpio.c new file mode 100644 index 0000000000..e43a4e8e69 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/gpio.c @@ -0,0 +1,176 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +static const struct pch_gpio_set1 pch_gpio_set1_mode = { + .gpio0 = GPIO_MODE_GPIO, + .gpio1 = GPIO_MODE_GPIO, + .gpio2 = GPIO_MODE_NATIVE, + .gpio3 = GPIO_MODE_NATIVE, + .gpio4 = GPIO_MODE_NATIVE, + .gpio5 = GPIO_MODE_NATIVE, + .gpio6 = GPIO_MODE_GPIO, + .gpio7 = GPIO_MODE_GPIO, + .gpio8 = GPIO_MODE_GPIO, + .gpio9 = GPIO_MODE_NATIVE, + .gpio10 = GPIO_MODE_NATIVE, + .gpio11 = GPIO_MODE_GPIO, + .gpio12 = GPIO_MODE_NATIVE, + .gpio13 = GPIO_MODE_GPIO, + .gpio14 = GPIO_MODE_NATIVE, + .gpio15 = GPIO_MODE_GPIO, + .gpio16 = GPIO_MODE_GPIO, + .gpio17 = GPIO_MODE_GPIO, + .gpio18 = GPIO_MODE_NATIVE, + .gpio19 = GPIO_MODE_NATIVE, + .gpio20 = GPIO_MODE_NATIVE, + .gpio21 = GPIO_MODE_GPIO, + .gpio22 = GPIO_MODE_GPIO, + .gpio23 = GPIO_MODE_NATIVE, + .gpio24 = GPIO_MODE_GPIO, + .gpio25 = GPIO_MODE_NATIVE, + .gpio26 = GPIO_MODE_NATIVE, + .gpio27 = GPIO_MODE_GPIO, + .gpio28 = GPIO_MODE_GPIO, + .gpio29 = GPIO_MODE_GPIO, + .gpio30 = GPIO_MODE_NATIVE, + .gpio31 = GPIO_MODE_GPIO, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_direction = { + .gpio0 = GPIO_DIR_INPUT, + .gpio1 = GPIO_DIR_INPUT, + .gpio6 = GPIO_DIR_INPUT, + .gpio7 = GPIO_DIR_INPUT, + .gpio8 = GPIO_DIR_INPUT, + .gpio11 = GPIO_DIR_INPUT, + .gpio13 = GPIO_DIR_INPUT, + .gpio15 = GPIO_DIR_OUTPUT, + .gpio16 = GPIO_DIR_INPUT, + .gpio17 = GPIO_DIR_OUTPUT, + .gpio21 = GPIO_DIR_INPUT, + .gpio22 = GPIO_DIR_INPUT, + .gpio24 = GPIO_DIR_INPUT, + .gpio27 = GPIO_DIR_INPUT, + .gpio28 = GPIO_DIR_OUTPUT, + .gpio29 = GPIO_DIR_OUTPUT, + .gpio31 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_level = { + .gpio15 = GPIO_LEVEL_LOW, + .gpio17 = GPIO_LEVEL_LOW, + .gpio28 = GPIO_LEVEL_LOW, + .gpio29 = GPIO_LEVEL_HIGH, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_invert = { + .gpio0 = GPIO_INVERT, + .gpio1 = GPIO_INVERT, + .gpio6 = GPIO_INVERT, + .gpio11 = GPIO_INVERT, + .gpio13 = GPIO_INVERT, +}; + +static const struct pch_gpio_set1 pch_gpio_set1_zero = { +}; + +static const struct pch_gpio_set2 pch_gpio_set2_mode = { + .gpio32 = GPIO_MODE_GPIO, + .gpio33 = GPIO_MODE_GPIO, + .gpio34 = GPIO_MODE_GPIO, + .gpio35 = GPIO_MODE_GPIO, + .gpio36 = GPIO_MODE_GPIO, + .gpio37 = GPIO_MODE_GPIO, + .gpio38 = GPIO_MODE_GPIO, + .gpio39 = GPIO_MODE_GPIO, + .gpio40 = GPIO_MODE_NATIVE, + .gpio41 = GPIO_MODE_NATIVE, + .gpio42 = GPIO_MODE_NATIVE, + .gpio43 = GPIO_MODE_GPIO, + .gpio44 = GPIO_MODE_NATIVE, + .gpio45 = GPIO_MODE_NATIVE, + .gpio46 = GPIO_MODE_GPIO, + .gpio47 = GPIO_MODE_NATIVE, + .gpio48 = GPIO_MODE_GPIO, + .gpio49 = GPIO_MODE_GPIO, + .gpio50 = GPIO_MODE_NATIVE, + .gpio51 = GPIO_MODE_NATIVE, + .gpio52 = GPIO_MODE_NATIVE, + .gpio53 = GPIO_MODE_NATIVE, + .gpio54 = GPIO_MODE_GPIO, + .gpio55 = GPIO_MODE_NATIVE, + .gpio56 = GPIO_MODE_NATIVE, + .gpio57 = GPIO_MODE_GPIO, + .gpio58 = GPIO_MODE_NATIVE, + .gpio59 = GPIO_MODE_NATIVE, + .gpio60 = GPIO_MODE_NATIVE, + .gpio61 = GPIO_MODE_GPIO, + .gpio62 = GPIO_MODE_NATIVE, + .gpio63 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set2 pch_gpio_set2_direction = { + .gpio32 = GPIO_DIR_INPUT, + .gpio33 = GPIO_DIR_INPUT, + .gpio34 = GPIO_DIR_INPUT, + .gpio35 = GPIO_DIR_INPUT, + .gpio36 = GPIO_DIR_INPUT, + .gpio37 = GPIO_DIR_INPUT, + .gpio38 = GPIO_DIR_INPUT, + .gpio39 = GPIO_DIR_INPUT, + .gpio43 = GPIO_DIR_INPUT, + .gpio46 = GPIO_DIR_INPUT, + .gpio48 = GPIO_DIR_INPUT, + .gpio49 = GPIO_DIR_INPUT, + .gpio54 = GPIO_DIR_INPUT, + .gpio57 = GPIO_DIR_INPUT, + .gpio61 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_mode = { + .gpio64 = GPIO_MODE_NATIVE, + .gpio65 = GPIO_MODE_NATIVE, + .gpio66 = GPIO_MODE_NATIVE, + .gpio67 = GPIO_MODE_NATIVE, + .gpio68 = GPIO_MODE_GPIO, + .gpio69 = GPIO_MODE_GPIO, + .gpio70 = GPIO_MODE_GPIO, + .gpio71 = GPIO_MODE_GPIO, + .gpio72 = GPIO_MODE_GPIO, + .gpio73 = GPIO_MODE_NATIVE, + .gpio74 = GPIO_MODE_NATIVE, + .gpio75 = GPIO_MODE_NATIVE, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_direction = { + .gpio68 = GPIO_DIR_INPUT, + .gpio69 = GPIO_DIR_INPUT, + .gpio70 = GPIO_DIR_INPUT, + .gpio71 = GPIO_DIR_OUTPUT, + .gpio72 = GPIO_DIR_INPUT, +}; + +static const struct pch_gpio_set3 pch_gpio_set3_level = { + .gpio71 = GPIO_LEVEL_LOW, +}; + +const struct pch_gpio_map mainboard_gpio_map = { + .set1 = { + .mode = &pch_gpio_set1_mode, + .direction = &pch_gpio_set1_direction, + .level = &pch_gpio_set1_level, + .blink = &pch_gpio_set1_zero, + .invert = &pch_gpio_set1_invert, + .reset = &pch_gpio_set1_zero, + }, + .set2 = { + .mode = &pch_gpio_set2_mode, + .direction = &pch_gpio_set2_direction, + }, + .set3 = { + .mode = &pch_gpio_set3_mode, + .direction = &pch_gpio_set3_direction, + .level = &pch_gpio_set3_level, + }, +}; diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/hda_verb.c b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/hda_verb.c new file mode 100644 index 0000000000..2a7a9d9f3a --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/hda_verb.c @@ -0,0 +1,32 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include + +const u32 cim_verb_data[] = { + 0x10ec0221, /* Codec Vendor / Device ID: Realtek */ + 0x103c339a, /* Subsystem ID */ + 11, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(0, 0x103c339a), + AZALIA_PIN_CFG(0, 0x12, AZALIA_PIN_CFG_NC(0)), + AZALIA_PIN_CFG(0, 0x14, 0x01014020), + AZALIA_PIN_CFG(0, 0x17, 0x90170110), + AZALIA_PIN_CFG(0, 0x18, AZALIA_PIN_CFG_NC(0)), + AZALIA_PIN_CFG(0, 0x19, AZALIA_PIN_CFG_NC(0)), + AZALIA_PIN_CFG(0, 0x1a, 0x02a11c3f), + AZALIA_PIN_CFG(0, 0x1b, 0x01813c30), + AZALIA_PIN_CFG(0, 0x1d, 0x598301f0), + AZALIA_PIN_CFG(0, 0x1e, AZALIA_PIN_CFG_NC(0)), + AZALIA_PIN_CFG(0, 0x21, 0x0221102f), + + 0x80862806, /* Codec Vendor / Device ID: Intel */ + 0x80860101, /* Subsystem ID */ + 4, /* Number of 4 dword sets */ + AZALIA_SUBVENDOR(3, 0x80860101), + AZALIA_PIN_CFG(3, 0x05, 0x58560010), + AZALIA_PIN_CFG(3, 0x06, 0x18560020), + AZALIA_PIN_CFG(3, 0x07, 0x58560030), +}; + +const u32 pc_beep_verbs[0] = {}; + +AZALIA_ARRAY_SIZES; diff --git a/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/overridetree.cb b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/overridetree.cb new file mode 100644 index 0000000000..243fa25a53 --- /dev/null +++ b/src/mainboard/hp/snb_ivb_desktops/variants/compaq_pro_6300/overridetree.cb @@ -0,0 +1,36 @@ +## SPDX-License-Identifier: GPL-2.0-only + +chip northbridge/intel/sandybridge + device domain 0 on + subsystemid 0x103c 0x339a inherit + + chip southbridge/intel/bd82x6x + register "sata_port_map" = "0x17" + # 0 = Blue + # 1 = White #1 + # 2 = White #2 + # 3,5 not implemented + # 4 = Black (eSATA) + register "superspeed_capable_ports" = "0xf" + register "xhci_switchable_ports" = "0xf" + register "usb_port_config" = "{ + {1, 0x84b, 0}, + {1, 0x84b, 0}, + {1, 0xa4b, 1}, + {1, 0xa4b, 1}, + {1, 0xb43, 2}, + {1, 0x94b, 2}, + {1, 0x94f, 3}, + {1, 0xb53, 3}, + {1, 1, 4}, + {1, 5, 4}, + {1, 0x65b, 6}, + {1, 0x65f, 5}, + {1, 0x84b, 5}, + {1, 0x94b, 6}, + }" + + device ref xhci on end + end + end +end