newconfig is no more.
Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
This commit is contained in:
Patrick Georgi
parent
389240f288
commit
abf2ad716d
653 changed files with 15 additions and 64257 deletions
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@ -1,129 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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## CONFIG_XIP_ROM_SIZE must be a power of 2.
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default CONFIG_XIP_ROM_SIZE = 64 * 1024
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include /config/nofailovercalculation.lb
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arch i386 end
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driver mainboard.o
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if CONFIG_GENERATE_PIRQ_TABLE
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object irq_tables.o
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end
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makerule ./failover.E
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depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
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action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
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end
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makerule ./failover.inc
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depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
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action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
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end
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makerule ./auto.E
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# depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
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depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
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action "../romcc -E -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
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end
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makerule ./auto.inc
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# depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
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depends "$(CONFIG_MAINBOARD)/auto.c ../romcc"
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action "../romcc -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
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end
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mainboardinit cpu/x86/16bit/entry16.inc
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mainboardinit cpu/x86/32bit/entry32.inc
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ldscript /cpu/x86/16bit/entry16.lds
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ldscript /cpu/x86/32bit/entry32.lds
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if CONFIG_USE_FALLBACK_IMAGE
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mainboardinit cpu/x86/16bit/reset16.inc
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ldscript /cpu/x86/16bit/reset16.lds
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else
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mainboardinit cpu/x86/32bit/reset32.inc
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ldscript /cpu/x86/32bit/reset32.lds
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end
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mainboardinit arch/i386/lib/cpu_reset.inc
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mainboardinit arch/i386/lib/id.inc
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ldscript /arch/i386/lib/id.lds
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if CONFIG_USE_FALLBACK_IMAGE
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ldscript /arch/i386/lib/failover.lds
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mainboardinit ./failover.inc
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end
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mainboardinit cpu/x86/fpu_enable.inc
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mainboardinit cpu/amd/model_gx1/cpu_setup.inc
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mainboardinit cpu/amd/model_gx1/gx_setup.inc
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mainboardinit ./auto.inc
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dir /pc80
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config chip.h
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chip northbridge/amd/gx1 # Northbridge
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device pci_domain 0 on # PCI domain
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device pci 0.0 on end # Host bridge
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chip southbridge/amd/cs5530 # Southbridge
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device pci 0f.0 on end # Ethernet (onboard)
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device pci 12.0 on # ISA bridge
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chip superio/nsc/pc97317 # Super I/O
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device pnp 2e.0 on # PS/2 keyboard
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io 0x60 = 0x60
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io 0x62 = 0x64
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irq 0x70 = 1
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end
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device pnp 2e.1 on # PS/2 mouse
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irq 0x70 = 12
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end
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device pnp 2e.2 on # RTC, Advanced power control (APC)
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io 0x60 = 0x70
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irq 0x70 = 8
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end
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device pnp 2e.3 off # Floppy (N/A on this board)
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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end
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device pnp 2e.4 on # Parallel port
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io 0x60 = 0x378
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irq 0x70 = 7
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end
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device pnp 2e.5 on # COM2 (used for smartcard reader)
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io 0x60 = 0x2f8
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irq 0x70 = 3
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end
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device pnp 2e.6 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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end
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device pnp 2e.7 on # GPIO
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io 0x60 = 0xe0
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end
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device pnp 2e.8 on # Power management
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io 0x60 = 0xe8
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end
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end
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end
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device pci 12.1 off end # SMI
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device pci 12.2 on end # IDE
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device pci 12.3 on end # Audio
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device pci 12.4 on end # VGA (onboard)
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device pci 13.0 on end # USB
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register "ide0_enable" = "1"
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register "ide1_enable" = "0" # Not available/needed on this board
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end
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end
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chip cpu/amd/model_gx1 # CPU
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end
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end
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@ -1,103 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2007 Juergen Beisert <juergen@kreuzholzen.de>
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
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## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
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##
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## You should have received a copy of the GNU General Public License
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## along with this program; if not, write to the Free Software
|
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## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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uses CONFIG_GENERATE_MP_TABLE
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uses CONFIG_GENERATE_PIRQ_TABLE
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uses CONFIG_USE_FALLBACK_IMAGE
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uses CONFIG_HAVE_FALLBACK_BOOT
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uses CONFIG_HAVE_HARD_RESET
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uses CONFIG_HAVE_OPTION_TABLE
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uses CONFIG_USE_OPTION_TABLE
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uses CONFIG_ROM_PAYLOAD
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uses CONFIG_IRQ_SLOT_COUNT
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uses CONFIG_MAINBOARD
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uses CONFIG_MAINBOARD_VENDOR
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uses CONFIG_MAINBOARD_PART_NUMBER
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uses COREBOOT_EXTRA_VERSION
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uses CONFIG_ARCH
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uses CONFIG_FALLBACK_SIZE
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uses CONFIG_STACK_SIZE
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uses CONFIG_HEAP_SIZE
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uses CONFIG_ROM_SIZE
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uses CONFIG_ROM_SECTION_SIZE
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uses CONFIG_ROM_IMAGE_SIZE
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uses CONFIG_ROM_SECTION_SIZE
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uses CONFIG_ROM_SECTION_OFFSET
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uses CONFIG_ROMBASE
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uses CONFIG_RAMBASE
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uses CONFIG_XIP_ROM_SIZE
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uses CONFIG_XIP_ROM_BASE
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uses CONFIG_CROSS_COMPILE
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uses CC
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uses HOSTCC
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uses CONFIG_OBJCOPY
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uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
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uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
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uses CONFIG_CONSOLE_SERIAL8250
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uses CONFIG_TTYS0_BAUD
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uses CONFIG_TTYS0_BASE
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uses CONFIG_TTYS0_LCS
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uses CONFIG_COMPRESSED_PAYLOAD_LZMA
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uses CONFIG_UDELAY_TSC
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uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
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uses CONFIG_VIDEO_MB
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uses CONFIG_SPLASH_GRAPHIC
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uses CONFIG_GX1_VIDEO
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uses CONFIG_GX1_VIDEOMODE
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uses CONFIG_PIRQ_ROUTE
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## Enable VGA with a splash screen (only 640x480 to run on most monitors).
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## We want to support up to 1024x768@16 so we need 2MiB video memory.
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## Note: Higher resolutions might need faster SDRAM speed.
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default CONFIG_GX1_VIDEO = 1
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default CONFIG_GX1_VIDEOMODE = 0
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default CONFIG_SPLASH_GRAPHIC = 1
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default CONFIG_VIDEO_MB = 2
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default CONFIG_ROM_SIZE = 256 * 1024
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default CONFIG_MAINBOARD_VENDOR = "BCOM"
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default CONFIG_MAINBOARD_PART_NUMBER = "WinNET100"
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default CONFIG_HAVE_FALLBACK_BOOT = 1
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default CONFIG_GENERATE_MP_TABLE = 0
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default CONFIG_HAVE_HARD_RESET = 0
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default CONFIG_UDELAY_TSC = 1
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default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
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default CONFIG_GENERATE_PIRQ_TABLE = 1
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default CONFIG_IRQ_SLOT_COUNT = 2 # Soldered NIC, internal USB, no real slots
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default CONFIG_PIRQ_ROUTE = 1
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default CONFIG_HAVE_OPTION_TABLE = 0
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default CONFIG_ROM_IMAGE_SIZE = 64 * 1024
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default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
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default CONFIG_STACK_SIZE = 8 * 1024
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default CONFIG_HEAP_SIZE = 16 * 1024
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default CONFIG_USE_OPTION_TABLE = 0
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default CONFIG_RAMBASE = 0x00004000
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default CONFIG_ROM_PAYLOAD = 1
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default CONFIG_CROSS_COMPILE = ""
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default CC = "$(CONFIG_CROSS_COMPILE)gcc "
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default HOSTCC = "gcc"
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default CONFIG_CONSOLE_SERIAL8250 = 1
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default CONFIG_TTYS0_BAUD = 115200
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default CONFIG_TTYS0_BASE = 0x3f8
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default CONFIG_TTYS0_LCS = 0x3 # 8n1
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default CONFIG_DEFAULT_CONSOLE_LOGLEVEL = 6
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default CONFIG_MAXIMUM_CONSOLE_LOGLEVEL = 6
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end
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@ -1,138 +0,0 @@
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##
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## This file is part of the coreboot project.
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##
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## Copyright (C) 2008 VIA Technologies, Inc.
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## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
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##
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## This program is free software; you can redistribute it and/or modify
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## it under the terms of the GNU General Public License as published by
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## the Free Software Foundation; either version 2 of the License, or
|
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## (at your option) any later version.
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##
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## This program is distributed in the hope that it will be useful,
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||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
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||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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##
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## CONFIG_XIP_ROM_SIZE must be a power of 2.
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default CONFIG_XIP_ROM_SIZE = 64 * 1024
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include /config/nofailovercalculation.lb
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arch i386 end
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driver mainboard.o
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if CONFIG_GENERATE_PIRQ_TABLE object irq_tables.o end
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if CONFIG_GENERATE_MP_TABLE object mptable.o end
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if CONFIG_GENERATE_ACPI_TABLES
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object fadt.o
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object dsdt.o
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object acpi_tables.o
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end
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makerule ./failover.E
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depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
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action "../romcc -E -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
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end
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makerule ./failover.inc
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depends "$(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c ../romcc"
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action "../romcc -O --label-prefix=failover -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/../../../arch/i386/lib/failover.c -o $@"
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end
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makerule ./auto.E
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depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
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action "../romcc -E -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
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end
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makerule ./auto.inc
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depends "$(CONFIG_MAINBOARD)/auto.c option_table.h ../romcc"
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action "../romcc -mcpu=c3 -O -I$(TOP)/src -I. $(CPPFLAGS) $(CONFIG_MAINBOARD)/auto.c -o $@"
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end
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mainboardinit cpu/x86/16bit/entry16.inc
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mainboardinit cpu/x86/32bit/entry32.inc
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ldscript /cpu/x86/16bit/entry16.lds
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ldscript /cpu/x86/32bit/entry32.lds
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if CONFIG_USE_FALLBACK_IMAGE
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mainboardinit cpu/x86/16bit/reset16.inc
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ldscript /cpu/x86/16bit/reset16.lds
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else
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mainboardinit cpu/x86/32bit/reset32.inc
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ldscript /cpu/x86/32bit/reset32.lds
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end
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mainboardinit arch/i386/lib/cpu_reset.inc
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mainboardinit arch/i386/lib/id.inc
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ldscript /arch/i386/lib/id.lds
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if CONFIG_USE_FALLBACK_IMAGE
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ldscript /arch/i386/lib/failover.lds
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mainboardinit ./failover.inc
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end
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mainboardinit cpu/x86/fpu_enable.inc
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mainboardinit ./auto.inc
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mainboardinit cpu/x86/mmx_disable.inc
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dir /pc80
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config chip.h
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chip northbridge/via/cn700 # Northbridge
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device pci_domain 0 on # PCI domain
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device pci 0.0 on end # AGP Bridge
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device pci 0.1 on end # Error Reporting
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device pci 0.2 on end # Host Bus Control
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device pci 0.3 on end # Memory Controller
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device pci 0.4 on end # Power Management
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device pci 0.7 on end # V-Link Controller
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device pci 1.0 on end # PCI Bridge
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chip southbridge/via/vt8237r # Southbridge
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# Enable both IDE channels.
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register "ide0_enable" = "1"
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register "ide1_enable" = "1"
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# Both cables are 40pin.
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register "ide0_80pin_cable" = "0"
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register "ide1_80pin_cable" = "0"
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register "fn_ctrl_lo" = "0x80"
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register "fn_ctrl_hi" = "0x1d"
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device pci f.0 on end # IDE
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device pci 10.0 on end # UHCI
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device pci 10.1 on end # UHCI
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device pci 10.2 on end # UHCI
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device pci 10.3 on end # UHCI
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device pci 10.4 on end # EHCI
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device pci 11.0 on # Southbridge LPC
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chip superio/winbond/w83697hf # Super I/O
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device pnp 2e.0 off # Floppy
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io 0x60 = 0x3f0
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irq 0x70 = 6
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drq 0x74 = 2
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||||
end
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||||
device pnp 2e.1 on # Parallel Port
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io 0x60 = 0x378
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irq 0x70 = 7
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||||
drq 0x74 = 3
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||||
end
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||||
device pnp 2e.2 on # COM1
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io 0x60 = 0x3f8
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irq 0x70 = 4
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||||
end
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device pnp 2e.3 on # COM2
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||||
io 0x60 = 0x2f8
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irq 0x70 = 3
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||||
end
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device pnp 2e.6 off end # Consumer IR
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||||
device pnp 2e.7 off end # Game port, GPIO 1
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device pnp 2e.8 off end # MIDI port, GPIO 5
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device pnp 2e.9 off end # GPIO 2-4
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||||
device pnp 2e.a off end # ACPI
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||||
device pnp 2e.b on # HWM
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io 0x60 = 0x290
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||||
end
|
||||
end
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||||
end
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device pci 11.5 on end # AC'97 audio
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||||
device pci 12.0 on end # Ethernet
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||||
end
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||||
end
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||||
device apic_cluster 0 on # APIC cluster
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chip cpu/via/model_c7 # VIA C7
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||||
device apic 0 on end # APIC
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||||
end
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||||
end
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||||
end
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@ -1,97 +0,0 @@
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|||
##
|
||||
## This file is part of the coreboot project.
|
||||
##
|
||||
## Copyright (C) 2008 VIA Technologies, Inc.
|
||||
## (Written by Aaron Lwe <aaron.lwe@gmail.com> for VIA)
|
||||
##
|
||||
## This program is free software; you can redistribute it and/or modify
|
||||
## it under the terms of the GNU General Public License as published by
|
||||
## the Free Software Foundation; either version 2 of the License, or
|
||||
## (at your option) any later version.
|
||||
##
|
||||
## This program is distributed in the hope that it will be useful,
|
||||
## but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
## GNU General Public License for more details.
|
||||
##
|
||||
## You should have received a copy of the GNU General Public License
|
||||
## along with this program; if not, write to the Free Software
|
||||
## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||
##
|
||||
|
||||
uses CONFIG_GENERATE_MP_TABLE
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||||
uses CONFIG_GENERATE_PIRQ_TABLE
|
||||
uses CONFIG_USE_FALLBACK_IMAGE
|
||||
uses CONFIG_HAVE_FALLBACK_BOOT
|
||||
uses CONFIG_HAVE_HARD_RESET
|
||||
uses CONFIG_HAVE_OPTION_TABLE
|
||||
uses CONFIG_USE_OPTION_TABLE
|
||||
uses CONFIG_ROM_PAYLOAD
|
||||
uses CONFIG_IRQ_SLOT_COUNT
|
||||
uses CONFIG_MAINBOARD
|
||||
uses CONFIG_MAINBOARD_VENDOR
|
||||
uses CONFIG_MAINBOARD_PART_NUMBER
|
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uses COREBOOT_EXTRA_VERSION
|
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uses CONFIG_ARCH
|
||||
uses CONFIG_FALLBACK_SIZE
|
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uses CONFIG_STACK_SIZE
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||||
uses CONFIG_HEAP_SIZE
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uses CONFIG_ROM_SIZE
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uses CONFIG_ROM_SECTION_SIZE
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uses CONFIG_ROM_IMAGE_SIZE
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||||
uses CONFIG_ROM_SECTION_SIZE
|
||||
uses CONFIG_ROM_SECTION_OFFSET
|
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uses CONFIG_COMPRESSED_PAYLOAD_NRV2B
|
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uses CONFIG_COMPRESSED_PAYLOAD_LZMA
|
||||
uses CONFIG_ROMBASE
|
||||
uses CONFIG_RAMBASE
|
||||
uses CONFIG_XIP_ROM_SIZE
|
||||
uses CONFIG_XIP_ROM_BASE
|
||||
uses CONFIG_GENERATE_MP_TABLE
|
||||
uses CONFIG_GENERATE_ACPI_TABLES
|
||||
uses CONFIG_HAVE_ACPI_RESUME
|
||||
uses CONFIG_CROSS_COMPILE
|
||||
uses CC
|
||||
uses HOSTCC
|
||||
uses CONFIG_OBJCOPY
|
||||
uses CONFIG_DEFAULT_CONSOLE_LOGLEVEL
|
||||
uses CONFIG_MAXIMUM_CONSOLE_LOGLEVEL
|
||||
uses CONFIG_CONSOLE_SERIAL8250
|
||||
uses CONFIG_UDELAY_TSC
|
||||
uses CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2
|
||||
uses CONFIG_PCI_ROM_RUN
|
||||
uses CONFIG_CONSOLE_VGA
|
||||
uses CONFIG_VIDEO_MB
|
||||
uses CONFIG_SMP
|
||||
uses CONFIG_IOAPIC
|
||||
|
||||
default CONFIG_ROM_SIZE = 512 * 1024
|
||||
default CONFIG_SMP = 1
|
||||
default CONFIG_IOAPIC = 1
|
||||
default CONFIG_VIDEO_MB = 32
|
||||
default CONFIG_CONSOLE_SERIAL8250 = 1
|
||||
default CONFIG_PCI_ROM_RUN = 0
|
||||
default CONFIG_CONSOLE_VGA = 0
|
||||
default CONFIG_HAVE_FALLBACK_BOOT = 1
|
||||
default CONFIG_GENERATE_MP_TABLE = 0
|
||||
default CONFIG_UDELAY_TSC = 1
|
||||
default CONFIG_TSC_X86RDTSC_CALIBRATE_WITH_TIMER2 = 1
|
||||
default CONFIG_HAVE_HARD_RESET = 0
|
||||
default CONFIG_GENERATE_PIRQ_TABLE = 1
|
||||
default CONFIG_IRQ_SLOT_COUNT = 10
|
||||
default CONFIG_GENERATE_ACPI_TABLES = 0
|
||||
default CONFIG_HAVE_OPTION_TABLE = 1
|
||||
default CONFIG_ROM_IMAGE_SIZE = 64 * 1024
|
||||
default CONFIG_FALLBACK_SIZE = CONFIG_ROM_IMAGE_SIZE
|
||||
default CONFIG_USE_FALLBACK_IMAGE = 1
|
||||
default CONFIG_STACK_SIZE = 8 * 1024
|
||||
default CONFIG_HEAP_SIZE = 16 * 1024
|
||||
#default CONFIG_USE_OPTION_TABLE = !CONFIG_USE_FALLBACK_IMAGE
|
||||
default CONFIG_USE_OPTION_TABLE = 0
|
||||
default CONFIG_RAMBASE = 0x00004000
|
||||
default CONFIG_ROM_PAYLOAD = 1
|
||||
default CONFIG_CROSS_COMPILE = ""
|
||||
default CC = "$(CONFIG_CROSS_COMPILE)gcc -m32 -fno-stack-protector"
|
||||
default HOSTCC = "gcc"
|
||||
|
||||
end
|
||||
Loading…
Add table
Add a link
Reference in a new issue