mb/google/brya/var/uldrenite: Add memory MT62F1G32D2DS-031RF WT:C

Add support for the new memory Micron MT62F1G32D2DS-031RF WT:C using
spd-3.hex.

DRAM Part Name                 ID to assign
H9JCNNNBK3MLYR-N6E             0 (0000)
K3KL6L60GM-MGCT                1 (0001)
K3KL8L80CM-MGCT                2 (0010)
MT62F1G32D2DS-026 WT:B         2 (0010)
H58G56CK8BX146                 3 (0011)
MT62F1G32D2DS-031RF WT:C       4 (0100)

BUG=b:459934066
BRANCH=firmware-trulo-15217.771.B
TEST=util/spd_tools/bin/part_id_gen ADL lp5 \
src/mainboard/google/brya/variants/uldrenite/memory \
src/mainboard/google/brya/variants/uldrenite/memory/mem_parts_used.txt

Change-Id: I76d8e1de2b96bd5f2cb319056d1f9307a7e2a114
Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/90255
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
This commit is contained in:
John Su 2025-11-28 10:40:24 +08:00 committed by Matt DeVillier
commit abe1ac0744
3 changed files with 3 additions and 0 deletions

View file

@ -8,3 +8,4 @@ SPD_SOURCES += spd/lp5/set-0/spd-1.hex # ID = 0(0b0000) Parts = H9JCNNNBK3
SPD_SOURCES += spd/lp5/set-0/spd-9.hex # ID = 1(0b0001) Parts = K3KL6L60GM-MGCT
SPD_SOURCES += spd/lp5/set-0/spd-7.hex # ID = 2(0b0010) Parts = K3KL8L80CM-MGCT, MT62F1G32D2DS-026 WT:B
SPD_SOURCES += spd/lp5/set-0/spd-11.hex # ID = 3(0b0011) Parts = H58G56CK8BX146
SPD_SOURCES += spd/lp5/set-0/spd-3.hex # ID = 4(0b0100) Parts = MT62F1G32D2DS-031RF WT:C

View file

@ -9,3 +9,4 @@ K3KL6L60GM-MGCT 1 (0001)
K3KL8L80CM-MGCT 2 (0010)
MT62F1G32D2DS-026 WT:B 2 (0010)
H58G56CK8BX146 3 (0011)
MT62F1G32D2DS-031RF WT:C 4 (0100)

View file

@ -14,3 +14,4 @@ K3KL6L60GM-MGCT
K3KL8L80CM-MGCT
MT62F1G32D2DS-026 WT:B
H58G56CK8BX146
MT62F1G32D2DS-031RF WT:C