aarch64/foundation-armv8: Set up RAM area and enter ramstage
Increase available RAM to 16M, register a ram_resource to it and enter ramstage. Bounce buffer seems to be broken yet, so assign the payload entry to be above coreboot area at 0x80000000 and it should jump to it. BUG=None BRANCH=none TEST=Boot to minimal payload at 0x80100000 which halts the emulation Change-Id: I77d6c56f5d4104c95283598b3d6ddabb8e5d0c7b Signed-off-by: Marcelo Povoa <marcelogp@chromium.org> Reviewed-on: https://chromium-review.googlesource.com/186745 Reviewed-by: David Hendricks <dhendrix@chromium.org>
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4 changed files with 7 additions and 4 deletions
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@ -186,7 +186,7 @@ ramstage-y += cbmem.c
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$(obj)/arch/aarch64/coreboot_table.ramstage.o : $(OPTION_TABLE_H)
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romstage-srcs += $(objgenerated)/crt0.s
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#ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
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ramstage-srcs += $(wildcard src/mainboard/$(MAINBOARDDIR)/mainboard.c)
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ifeq ($(CONFIG_BOARD_HAS_HARD_RESET),y)
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#ramstage-srcs += src/mainboard/$(MAINBOARDDIR)/reset.c
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@ -111,10 +111,9 @@ config RAMBASE
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hex
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default SYS_SDRAM_BASE
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# according to stefan, this is RAMBASE + 1M.
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config RAMTOP
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hex
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default 0x80100000
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default 0x81000000
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config STACK_TOP
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hex
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@ -19,9 +19,13 @@
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static void mainboard_enable(device_t dev)
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{
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printk(BIOS_INFO, "Enable foundation/armv8 device...\n");
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ram_resource(dev, 0, CONFIG_RAMBASE / KiB,
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(CONFIG_RAMTOP - CONFIG_RAMBASE) / KiB);
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}
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struct chip_operations mainboard_ops = {
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CHIP_NAME("Foundation ARMv8 Model")
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.enable_dev = mainboard_enable,
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};
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@ -25,5 +25,5 @@ void main(void)
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entry = cbfs_load_stage(CBFS_DEFAULT_MEDIA, "fallback/coreboot_ram");
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//stage_exit(entry);
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stage_exit(entry);
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}
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