From ab2fe947d3e4355376e3d207e2d5169f44fb8dec Mon Sep 17 00:00:00 2001 From: "Ronald G. Minnich" Date: Wed, 28 Mar 2001 22:32:07 +0000 Subject: [PATCH] This is closer to correct. However, the 64M support for CAS size is not in yet. --- src/northbridge/acer/m1631/ipl.S | 10 +++------- 1 file changed, 3 insertions(+), 7 deletions(-) diff --git a/src/northbridge/acer/m1631/ipl.S b/src/northbridge/acer/m1631/ipl.S index 5e6191d4f0..c7ec289c76 100644 --- a/src/northbridge/acer/m1631/ipl.S +++ b/src/northbridge/acer/m1631/ipl.S @@ -270,16 +270,12 @@ sizeram: roll $1, %esi movb $7, (%esi) cmpb $0, (%edi) + // If @0 is unchanged, then we have four banks. jz 1f /* 4 banks */ - /* NOTE 03-22-01 RGM - * I THINK THIS SHOULD BE 0x1800000! - */ - orl $0x1800000, %ecx - jmp 2f + // If @0 got overwritten, then we only have two banks. /* clear 4 banks */ -1: andb $0xfe, %cl -2: +1: WRITE_MCR0 /* Next line ASSUMES that eax contains 8000000xx