From a89c4624bdd2f212262ef79c092ba17a918fac7c Mon Sep 17 00:00:00 2001 From: John Su Date: Tue, 11 Feb 2025 17:53:20 +0800 Subject: [PATCH] mb/trulo/var/uldrenite: Remove GPP_E13 from being used as RAM ID3 Remove GPP_E13 from being used as RAM ID3. Planned to be used as a strap pin to disable memory channels for x32 memory configuration. BUG=b:379311559 BRANCH=firmware-trulo-15217.771.B TEST=emerge-nissa coreboot chromeos-bootimage Change-Id: I418f84255959452d5a63612ab703ec11d81f2e33 Signed-off-by: John Su Reviewed-on: https://review.coreboot.org/c/coreboot/+/86362 Reviewed-by: Dtrain Hsu Reviewed-by: Subrata Banik Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/variants/uldrenite/gpio.c | 4 ++-- src/mainboard/google/brya/variants/uldrenite/memory.c | 4 +--- 2 files changed, 3 insertions(+), 5 deletions(-) diff --git a/src/mainboard/google/brya/variants/uldrenite/gpio.c b/src/mainboard/google/brya/variants/uldrenite/gpio.c index 4b900fbbec..13bc2169e1 100644 --- a/src/mainboard/google/brya/variants/uldrenite/gpio.c +++ b/src/mainboard/google/brya/variants/uldrenite/gpio.c @@ -184,8 +184,8 @@ static const struct pad_config gpio_table[] = { PAD_NC_LOCK(GPP_E11, NONE, LOCK_CONFIG), /* E12 : THC0_SPI1_IO1 ==> RAM_ID2 */ PAD_CFG_GPI_LOCK(GPP_E12, NONE, LOCK_CONFIG), - /* E13 : NC ==> RAM_ID3 */ - PAD_CFG_GPI_LOCK(GPP_E13, NONE, LOCK_CONFIG), + /* E13 : NC */ + PAD_NC_LOCK(GPP_E13, NONE, LOCK_CONFIG), /* E14 : DDSP_HPDA ==> EDP_HPD */ PAD_CFG_NF(GPP_E14, NONE, DEEP, NF1), /* E15 : NC */ diff --git a/src/mainboard/google/brya/variants/uldrenite/memory.c b/src/mainboard/google/brya/variants/uldrenite/memory.c index 03e97a1906..9ade7c2013 100644 --- a/src/mainboard/google/brya/variants/uldrenite/memory.c +++ b/src/mainboard/google/brya/variants/uldrenite/memory.c @@ -81,13 +81,11 @@ int variant_memory_sku(void) * GPIO_MEM_CONFIG_0 GPP_E2 * GPIO_MEM_CONFIG_1 GPP_E1 * GPIO_MEM_CONFIG_2 GPP_E12 - * GPIO_MEM_CONFIG_3 GPP_E13 */ gpio_t spd_gpios[] = { GPP_E2, GPP_E1, - GPP_E12, - GPP_E13 + GPP_E12 }; return gpio_base2_value(spd_gpios, ARRAY_SIZE(spd_gpios));