From a899359720158a619f2933940cc2da8a48c43aad Mon Sep 17 00:00:00 2001 From: Matt DeVillier Date: Sun, 20 Apr 2025 17:14:18 -0500 Subject: [PATCH] sb/intel/bd82x6x: Add CFR objects for existing options Add a header with CFR objects for existing configuration options, so that supported boards can make use of them without duplication. TEST=build/boot samsung/stumpy with CFR options enabled. Change-Id: Ia6906992deb948869ecfd8a5f6fc3883220811ec Signed-off-by: Matt DeVillier Reviewed-on: https://review.coreboot.org/c/coreboot/+/87389 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/southbridge/intel/bd82x6x/cfr.h | 83 +++++++++++++++++++++++++++++ 1 file changed, 83 insertions(+) create mode 100644 src/southbridge/intel/bd82x6x/cfr.h diff --git a/src/southbridge/intel/bd82x6x/cfr.h b/src/southbridge/intel/bd82x6x/cfr.h new file mode 100644 index 0000000000..8b9f928f34 --- /dev/null +++ b/src/southbridge/intel/bd82x6x/cfr.h @@ -0,0 +1,83 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* + * CFR enums and structs for sb/bd82x6x + */ + +#ifndef SB_BD82X6X_CFR_H +#define SB_BD82X6X_CFR_H + +#include +#include +#include "me.h" + +/* Power state after power loss */ +static const struct sm_object power_on_after_fail = SM_DECLARE_ENUM({ + .opt_name = "power_on_after_fail", + .ui_name = "Restore AC Power Loss", + .ui_helptext = "Specify what to do when power is re-applied after a power loss.", + .default_value = CONFIG_MAINBOARD_POWER_FAILURE_STATE, + .values = (const struct sm_enum_value[]) { + { "Power off (S5)", MAINBOARD_POWER_OFF }, + { "Power on (S0)", MAINBOARD_POWER_ON }, + { "Previous state", MAINBOARD_POWER_KEEP }, + SM_ENUM_VALUE_END }, +}); + +/* Intel ME State */ +static const struct sm_object me_state = SM_DECLARE_ENUM({ + .opt_name = "me_state", + .ui_name = "Intel Management Engine", + .ui_helptext = "Enable or disable the Intel Management Engine", + .default_value = CMOS_ME_STATE_NORMAL, + .values = (const struct sm_enum_value[]) { + { "Disabled", CMOS_ME_STATE_DISABLED }, + { "Enabled", CMOS_ME_STATE_NORMAL }, + SM_ENUM_VALUE_END }, +}); + +/* Intel ME State on previous boot */ +static const struct sm_object me_state_prev = SM_DECLARE_NUMBER({ + .opt_name = "me_state_prev", + .ui_name = "ME State Previous Boot", + .flags = CFR_OPTFLAG_SUPPRESS, + .default_value = CMOS_ME_STATE_NORMAL, +}); + +enum { + SATA_MODE_AHCI, + SATA_MODE_IDE_COMPAT, + SATA_MODE_IDE_LEGACY, +}; + +/* SATA controller mode */ +static const struct sm_object sata_mode = SM_DECLARE_ENUM({ + .opt_name = "sata_mode", + .ui_name = "SATA Mode", + .ui_helptext = "Specify mode of the SATA controller", + .default_value = SATA_MODE_AHCI, + .values = (const struct sm_enum_value[]) { + { "AHCI", SATA_MODE_AHCI }, + { "IDE (compatible)", SATA_MODE_IDE_COMPAT }, + { "IDE (legacy)", SATA_MODE_IDE_LEGACY }, + SM_ENUM_VALUE_END }, +}); + +enum { + NMI_OFF, + NMI_ON, +}; + +/* Non-maskable interrupts */ +static const struct sm_object nmi = SM_DECLARE_ENUM({ + .opt_name = "nmi", + .ui_name = "Non-maskable Interrupts", + .ui_helptext = "Enable or disable non-maskable interrupts", + .default_value = NMI_OFF, + .values = (const struct sm_enum_value[]) { + { "Disabled", NMI_OFF }, + { "Enabled", NMI_ON }, + SM_ENUM_VALUE_END }, +}); + +#endif /* SB_BD82X6X_CFR_H */