From a87e699f043017e27a45fe3ba10cccbeda6b5179 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= Date: Sat, 29 Mar 2025 14:25:11 +0100 Subject: [PATCH] mb/lenovo/m900_tiny: Enable Vboot MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Add Vboot configuration (Kconfig and FMDs for RO only and RW_A layouts). TEST=Build with UEFIPayload and boot to payload. Verify in cbmem logs that verstage has executed and selected Slot A in the case of RW_A layout. Change-Id: Ide2a3a4b59be5b27bf7315690520c9392a98d044 Signed-off-by: Michał Kopeć Reviewed-on: https://review.coreboot.org/c/coreboot/+/87043 Tested-by: build bot (Jenkins) Reviewed-by: Filip Lewiński Reviewed-by: Matt DeVillier --- src/mainboard/lenovo/m900_tiny/Kconfig | 11 ++++++ src/mainboard/lenovo/m900_tiny/vboot-ro.fmd | 30 ++++++++++++++++ src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd | 36 ++++++++++++++++++++ 3 files changed, 77 insertions(+) create mode 100644 src/mainboard/lenovo/m900_tiny/vboot-ro.fmd create mode 100644 src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd diff --git a/src/mainboard/lenovo/m900_tiny/Kconfig b/src/mainboard/lenovo/m900_tiny/Kconfig index 8f018b5700..71a02d6118 100644 --- a/src/mainboard/lenovo/m900_tiny/Kconfig +++ b/src/mainboard/lenovo/m900_tiny/Kconfig @@ -41,4 +41,15 @@ config PRERAM_CBMEM_CONSOLE_SIZE config DIMM_SPD_SIZE default 512 #DDR4 +config VBOOT + select GBB_FLAG_DISABLE_EC_SOFTWARE_SYNC + select GBB_FLAG_DISABLE_FWMP + select GBB_FLAG_DISABLE_LID_SHUTDOWN + select GBB_FLAG_DISABLE_PD_SOFTWARE_SYNC + select HAS_RECOVERY_MRC_CACHE + select VBOOT_VBNV_FLASH + +config FMDFILE + default "src/mainboard/\$(CONFIG_MAINBOARD_DIR)/vboot-rwa.fmd" if VBOOT + endif diff --git a/src/mainboard/lenovo/m900_tiny/vboot-ro.fmd b/src/mainboard/lenovo/m900_tiny/vboot-ro.fmd new file mode 100644 index 0000000000..40855e7c01 --- /dev/null +++ b/src/mainboard/lenovo/m900_tiny/vboot-ro.fmd @@ -0,0 +1,30 @@ +FLASH 16M { + SI_ALL 8M { + SI_DESC 4K + SI_GBE 8K + SI_ME + } + SI_BIOS 8M { + RW_MISC 2M { + UNIFIED_MRC_CACHE(PRESERVE) 128K { + RECOVERY_MRC_CACHE 64K + RW_MRC_CACHE 64K + } + SMMSTORE(PRESERVE) 256K + RW_ELOG(PRESERVE) 16K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + RW_NVRAM(PRESERVE) 24K + } + + WP_RO { + FMAP 2K + RO_FRID 128 + RO_PADDING 1920 + GBB 120K + COREBOOT(CBFS) + } + } +} diff --git a/src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd b/src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd new file mode 100644 index 0000000000..df3bfdb417 --- /dev/null +++ b/src/mainboard/lenovo/m900_tiny/vboot-rwa.fmd @@ -0,0 +1,36 @@ +FLASH 16M { + SI_ALL 8M { + SI_DESC 4K + SI_GBE 8K + SI_ME + } + SI_BIOS 8M { + RW_MISC 2M { + UNIFIED_MRC_CACHE(PRESERVE) 128K { + RECOVERY_MRC_CACHE 64K + RW_MRC_CACHE 64K + } + SMMSTORE(PRESERVE) 256K + RW_ELOG(PRESERVE) 16K + RW_SHARED 16K { + SHARED_DATA 8K + VBLOCK_DEV 8K + } + RW_NVRAM(PRESERVE) 24K + } + + RW_SECTION_A 3M { + VBLOCK_A 8K + FW_MAIN_A(CBFS) + RW_FWID_A 128 + } + + WP_RO 3M { + FMAP 2K + RO_FRID 128 + RO_PADDING 1920 + GBB 120K + COREBOOT(CBFS) + } + } +}