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verstage: Add proper guard conditions

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BUG=None
BRANCH=None
TEST=Compiles successfully

Change-Id: I8494402144ad22a4e1c0652e3c94e59cd706bb16
Signed-off-by: Furquan Shaikh <furquan@google.com>
Reviewed-on: https://chromium-review.googlesource.com/221808
Tested-by: Furquan Shaikh <furquan@chromium.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Commit-Queue: Furquan Shaikh <furquan@chromium.org>
This commit is contained in:
Furquan Shaikh 2014-10-07 06:43:35 -07:00 • committed by chrome-internal-fetch
commit a843bb6773
1 changed files with 4 additions and 0 deletions
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4
src/arch/arm/Makefile.inc
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@ -62,6 +62,8 @@ endif # CONFIG_ARCH_BOOTBLOCK_ARM
# verification stage
###############################################################################
ifeq ($(CONFIG_ARCH_VERSTAGE_ARM),y)
$(objcbfs)/verstage.debug: $$(verstage-objs) $$(VB2_LIB)
@printf " LINK $(subst $(obj)/,,$(@))\n"
$(call link,verstage,$(filter %.a %.o,$(^)),-o $(@) -L$(obj) -T $(obj)/mainboard/$(MAINBOARDDIR)/memlayout.verstage.ld,--gc-sections)
@ -74,6 +76,8 @@ verstage-y += memcpy.S
verstage-y += memmove.S
verstage-y += stages.c
endif # CONFIG_ARCH_VERSTAGE_ARM
###############################################################################
# romstage
###############################################################################