Initial checkin for supermicro p4dc6
This also includes a bunch of my pending work including - Updated serial code so we can compile in different serial port speeds - Updates to the build system so that: - Makefile.settings holds all of the settings of the config variables - ldoptions and cpuflags are generated automatically with perl scripts - src/config/Config holds all of the architecture neutral make file settings - Initial work on the P4 including how to use cache as ram - Update to the ioapic code for the P4 because it delivers irqs on the system bus instead of an out of band bus - Updated version of printf that doesn't need an intermediate buffer - logbuf_subr now handles the case when we want to use a log buffer - video_subr handles the preliminary code for writing to a video device. - Pending changes for the L440GX are merged in as well (hopefully I haven't messed then up since they were written).
This commit is contained in:
Eric W. Biederman
parent
be3ebbe61f
commit
a8151ba2cd
53 changed files with 2071 additions and 351 deletions
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@ -1,42 +1,19 @@
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biosbase 0
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rambase 0x8000
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makedefine CC:=gcc
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makedefine LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name)
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makedefine GCC_INC_DIR := $(shell $(CC) -print-search-dirs | sed -ne "s/install: \(.*\)/\1include/gp")
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makedefine CPPFLAGS= -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS)
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makedefine CFLAGS= $(CPU_OPT) $(CPPFLAGS) -O2 -nostdinc -nostdlib -fno-builtin -Wall
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option USE_DEFAULT_LAYOUT=1
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ldscript arch/alpha/config/ldscript.base USE_DEFAULT_LAYOUT
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makedefine LINK = ld -T ldscript.ld -o $@ crt0.o linuxbios.a
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makerule all : linuxbios.rom ;
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makerule linuxbios.rom: linuxbios.strip makerom ; ./makerom -l0x310000 -i7 -v linuxbios.strip -o linuxbios.rom
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makerule linuxbios.strip: linuxbios ; objcopy -O binary -R .note -R .comment -S linuxbios linuxbios.strip
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makerule linuxbios: linuxbios.a ; @rm -f biosobject
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makerule etags: $(SOURCES) ; etags $(SOURCES)
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makerule tags: $(SOURCES) ; ctags $(SOURCES)
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makerule documentation: $(SOURCES) ; doxygen LinuxBIOSDoc.config
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addaction linuxbios $(LINK)
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addaction linuxbios nm -n linuxbios > linuxbios.map
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makerule ldscript.ld : ldscript.options $(LDSUBSCRIPTS-1) ; echo "INCLUDE ldscript.options" > ldscript.ld ; for file in $(LDSUBSCRIPTS-1) ; do echo "INCLUDE $$file" >> ldscript.ld ; done
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makerule linuxbios.a : $(OBJECTS-1) ; rm -f linuxbios.a
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addaction linuxbios.a ar cr linuxbios.a $(OBJECTS-1)
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makerule crt0.s: crt0.S ; $(CC) $(CPPFLAGS) -I$(TOP)/src -E $< > crt0.s
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makerule crt0.o : crt0.s; $(CC) $(CPU_OPT) -c crt0.s
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#makerule makerom: $(TOP)/util/makerom/makerom.c $(TOP)/util/makerom/compress.c ; $(CC) -o makerom $(TOP)/util/makerom/makerom.c $(TOP)/util/makerom/compress.c
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makerule clean : ; rm -f linuxbios.* *.o mkrom xa? *~
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addaction clean rm -f linuxbios crt0.s
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addaction clean rm -f a.out *.s *.l
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addaction clean rm -f TAGS tags
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addaction clean rm -f docipl
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addaction clean rm -f makerom
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# do standard config files that the user need not specify
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# for now, this is just 'lib', but it may be more later.
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dir /src/arch/alpha
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dir /src/lib
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dir /src/boot
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dir /src/rom
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dir /util/makerom
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@ -26,9 +26,9 @@
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CRT0_PARAMETERS
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#if defined(SERIAL_CONSOLE) && defined(DEBUG)
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#if defined(SERIAL_CONSOLE) && (DEFAULT_CONSOLE_LOGLEVEL >= 7)
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TTYS0_TX_STRING($str_after_ram)
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#endif /* defined(SERIAL_CONSOLE) && defined(DEBUG) */
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#endif
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/* clear boot_complete flag */
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xorl %ebp, %ebp
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@ -96,10 +96,9 @@ __main:
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*/
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intel_chip_post_macro(0xfe) /* post fe */
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#if defined(SERIAL_CONSOLE) && defined(DEBUG)
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#if defined(SERIAL_CONSOLE) && (DEFAULT_CONSOLE_LOGLEVEL >= 7)
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TTYS0_TX_STRING($str_pre_main)
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#endif /* defined(SERIAL_CONSOLE) && defined(DEBUG) */
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#endif
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/* memory is up. Let\'s do the rest in C -- much easier. */
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@ -6,63 +6,43 @@ option ROM_IMAGE_SIZE=65536
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option MAX_CPUS=1
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# Reserve 256K for the heap
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option HEAP_SIZE=0x40000
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# Reserve 64K for each stack
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option STACK_SIZE=0x10000
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# Reserve 8K for each stack
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option STACK_SIZE=0x2000
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# By default on x86 we have a memory hole between 640K and 1MB
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option MEMORY_HOLE=1
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makedefine CC:=gcc
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makedefine CPP:= gcc -x assembler-with-cpp -DASSEMBLY -E
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makedefine LIBGCC_FILE_NAME := $(shell $(CC) -print-libgcc-file-name)
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makedefine GCC_INC_DIR := $(shell $(CC) -print-search-dirs | sed -ne "s/install: \(.*\)/\1include/gp")
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makedefine CPPFLAGS := -I$(TOP)/src/include -I$(TOP)/src/arch/$(ARCH)/include -I$(GCC_INC_DIR) $(CPUFLAGS)
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makedefine CFLAGS := $(CPU_OPT) $(CPPFLAGS) -O2 -nostdinc -nostdlib -fno-builtin -Wall
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option USE_DEFAULT_LAYOUT=1
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ldscript arch/i386/config/ldscript.base USE_DEFAULT_LAYOUT
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ldscript arch/i386/config/ldscript.cacheram USE_CACHE_RAM
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# How do I add -mprefered-stack-boundary=2 if the compiler supports it?
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# On x86 tt results in a code size reduction.
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#
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dir /src/config
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makerule all : romimage ;
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makerule floppy : all ; mcopy -o romimage a:
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makerule romimage : linuxbios.rom vmlinux.bin.gz.block ; cat vmlinux.bin.gz.block linuxbios.rom > romimage
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makerule linuxbios.rom: linuxbios.strip ;
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addaction linuxbios.rom export size=`ls -l linuxbios.strip | (read p c u g size r ; echo $$size)` ; \
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addaction linuxbios.rom echo $$size ; \
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addaction linuxbios.rom dd if=linuxbios.strip of=linuxbios.rom bs=1 seek=`expr $(ROM_IMAGE_SIZE) - $$size`
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makerule linuxbios.strip: linuxbios ; objcopy -O binary linuxbios linuxbios.strip
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makerule linuxbios.o : crt0.o linuxbios.a $(LIBGCC_FILE_NAME) ; $(CC) -nostdlib -r -o $@ crt0.o linuxbios.a $(LIBGCC_FILE_NAME)
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makerule ldscript.ld : ldoptions $(LDSUBSCRIPTS-1) ; echo "INCLUDE ldoptions" > ldscript.ld ; for file in $(LDSUBSCRIPTS-1) ; do echo "INCLUDE $$file" >> ldscript.ld ; done
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makerule linuxbios: linuxbios.o ldscript.ld ; $(CC) -nostdlib -nostartfiles -static -o $@ -T ldscript.ld linuxbios.o
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addaction linuxbios nm -n linuxbios > linuxbios.map
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makerule etags: $(SOURCES) ; etags $(SOURCES)
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makerule tags: $(SOURCES) ; ctags $(SOURCES)
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makerule documentation: $(SOURCES) ; doxygen LinuxBIOSDoc.config
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makerule linuxbios.a : $(OBJECTS-1) ; rm -f linuxbios.a
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addaction linuxbios.a ar cr linuxbios.a $(OBJECTS-1)
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makerule crt0.s: crt0.S ; $(CPP) $(CPPFLAGS) -I$(TOP)/src $< > crt0.s
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makerule crt0.o : crt0.s; $(CC) $(CPU_OPT) -c crt0.s
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makerule mkrom: $(TOP)/mkrom/mkrom.c ; $(CC) -o mkrom $<
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makerule clean : ; rm -f linuxbios.* vmlinux.* *.o mkrom xa? *~
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addaction clean rm -f linuxbios romimage crt0.s
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addaction clean rm -f a.out *.s *.l
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addaction clean rm -f TAGS tags
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addaction clean rm -f docipl
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makerule vmlinux.bin.gz.block : vmlinux.bin.gz ; dd conv=sync bs=448k if=vmlinux.bin.gz of=vmlinux.bin.gz.block
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makerule vmlinux.bin.gz: vmlinux.bin ;gzip -f -3 vmlinux.bin
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makerule vmlinux.bin: $(LINUX)/vmlinux ; objcopy -O binary -R .note -R .comment -S $< vmlinux.bin
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addaction clean rm -f romimage mkrom vmlinux.*
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# do standard config files that the user need not specify
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# for now, this is just 'lib', but it may be more later.
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dir /src/arch/i386
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dir /src/lib
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dir /src/boot
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dir /src/rom
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@ -1,4 +1,4 @@
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object i386_subr.o
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object params.o
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object hardwaremain.o
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object pirq_routing.o
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object pirq_routing.o HAVE_PIRQ_TABLE
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@ -9,6 +9,10 @@
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#include <string.h>
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#include <arch/i386_subr.h>
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#if defined(SMP) || defined(IOAPIC)
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#define APIC 1
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#endif
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void cache_on(unsigned long totalram)
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{
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post_code(0x60);
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@ -45,7 +49,7 @@ void interrupts_on()
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* see the Intel mp1.4 spec, page A-3
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*/
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#if defined(SMP)
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#if defined(APIC)
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/* Only Pentium Pro and later have those MSR stuff */
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unsigned long low, high;
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@ -81,7 +85,7 @@ void interrupts_on()
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| (APIC_LVT_REMOTE_IRR |APIC_SEND_PENDING |
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APIC_DELIVERY_MODE_NMI)
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);
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#else /* SMP */
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#else /* APIC */
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#ifdef i686
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/* Only Pentium Pro and later have those MSR stuff */
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unsigned long low, high;
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low &= ~APIC_BASE_MSR_ENABLE;
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wrmsr(APIC_BASE_MSR, low, high);
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#endif /* i686 */
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#endif /* SMP */
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#endif /* APIC */
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printk_info("done.\n");
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post_code(0x9b);
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}
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#ifdef HAVE_PIRQ_TABLE
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#include <printk.h>
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#include <pci.h>
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#include <arch/pirq_routing.h>
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memcpy((char *) RTABLE_DEST, &intel_irq_routing_table, intel_irq_routing_table.size);
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printk_info("done.\n");
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}
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#endif /* HAVE_PIRQ_TABLE */
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6
src/arch/i386/lib/set_memory_size_noop.inc
Normal file
6
src/arch/i386/lib/set_memory_size_noop.inc
Normal file
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@ -0,0 +1,6 @@
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jmp set_memory_size_out
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set_memory_size:
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RETSP
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set_memory_size_out:
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#define NMI (4 << 8)
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#define SMI (2 << 8)
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#define INT (1 << 8)
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#if 0 /* L440GX */
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{0x00, DISABLED, NONE},
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{0x01, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x59, ALL},
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{0x02, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x51, ALL},
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{0x03, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x61, NONE},
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{0x04, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x69, ALL},
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{0x05, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x71, NONE},
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{0x06, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x79, NONE},
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{0x07, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x81, NONE},
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{0x08, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x89, ALL},
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{0x09, DISABLED, NONE},
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{0x0a, DISABLED, NONE},
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{0x0b, DISABLED, NONE},
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{0x0c, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x91, ALL},
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{0x0d, DISABLED, NONE},
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{0x0e, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x99, ALL},
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{0x0f, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0xa1, ALL},
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{0x10, DISABLED, NONE},
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{0x11, DISABLED, NONE},
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{0x12, DISABLED, NONE},
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{0x13, ENABLED|TRIGGER_LEVEL|POLARITY_LOW|LOGICAL_DEST|INT|0xa9, ALL},
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{0x14, DISABLED, NONE},
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{0x15, ENABLED|TRIGGER_LEVEL|POLARITY_LOW|LOGICAL_DEST|INT|0xb1, ALL},
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{0x16, DISABLED, NONE},
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{0x17, DISABLED, NONE}
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#endif
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#if 0 /* tyan guinness */
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/* mask, trigger, polarity, destination, delivery, vector */
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{0x00, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|ExtINT|0x0, ALL},
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{0x01, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x1, ALL},
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{0x02, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x0, ALL},
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{0x03, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x3, ALL},
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{0x04, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x4, ALL},
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{0x05, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x5, ALL},
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{0x06, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x6, ALL},
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{0x07, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x7, ALL},
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{0x08, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x8, ALL},
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{0x09, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0x9, ALL},
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{0x0a, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0xa, ALL},
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{0x0b, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0xb, ALL},
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{0x0c, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0xc, ALL},
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{0x0d, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0xd, ALL},
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{0x0e, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0xe, ALL},
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{0x0f, ENABLED|TRIGGER_EDGE|POLARITY_HIGH|LOGICAL_DEST|INT|0xf, ALL},
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{0x10, ENABLED|TRIGGER_LEVEL|POLARITY_LOW|LOGICAL_DEST|INT|0x10, ALL},
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{0x11, ENABLED|TRIGGER_LEVEL|POLARITY_LOW|LOGICAL_DEST|INT|0x11, ALL},
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{0x12, ENABLED|TRIGGER_LEVEL|POLARITY_LOW|LOGICAL_DEST|INT|0x12, ALL},
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{0x13, ENABLED|TRIGGER_LEVEL|POLARITY_LOW|LOGICAL_DEST|INT|0x13, ALL},
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{0x14, DISABLED, NONE},
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{0x14, DISABLED, NONE},
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{0x15, DISABLED, NONE},
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{0x16, DISABLED, NONE},
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{0x17, DISABLED, NONE},
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#endif
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#if 1
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/* mask, trigger, polarity, destination, delivery, vector */
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{0x00, DISABLED, NONE},
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{0x01, DISABLED, NONE},
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@ -105,7 +50,6 @@ struct ioapicreg ioapicregvalues[] = {
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{0x15, DISABLED, NONE},
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{0x16, DISABLED, NONE},
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{0x17, DISABLED, NONE},
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#endif
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};
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void setup_ioapic(void)
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@ -117,6 +61,13 @@ void setup_ioapic(void)
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struct ioapicreg *a = ioapicregvalues;
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l = (unsigned long *) nvram;
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#if defined(i786)
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/* For the pentium 4 and above apic deliver their interrupts
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* on the front side bus, enable that.
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*/
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l[0] = 0x03;
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l[4] = 1;
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#endif /* i786 */
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for (i = 0; i < sizeof(ioapicregvalues) / sizeof(ioapicregvalues[0]);
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i++, a++) {
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l[0] = (a->reg * 2) + 0x10;
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Loading…
Add table
Add a link
Reference in a new issue