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mb/starlabs/*: Use a safe configurations for DRAM Sleep GPIO

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The configuration used was copied from other boards in the tree,
NF1/NF2. However, no Intel documents says that GPP_E8 has a native
function.

As it remains unclear if the other boards in the tree are
misconfiugured, or the documents are incorrect, revert to a safe
configuration for the GPIO.

Change-Id: I49b8faa7f8712ad0ead22b7ccbfa6deca6046368
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/86332
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
This commit is contained in:
Sean Rhodes 2025-02-08 19:42:34 +00:00 • committed by Matt DeVillier
commit a810b2762d
6 changed files with 6 additions and 6 deletions
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2
src/mainboard/starlabs/byte_adl/variants/mk_ii/gpio.c
View file

@ -256,7 +256,7 @@ const struct pad_config gpio_table[] = {
/* E7: Embedded Controller SMI */
PAD_NC(GPP_E7, NONE),
/* E8: DRAM Sleep */
PAD_NC(GPP_E8, NONE),
PAD_CFG_GPO(GPP_E8, 1, DEEP),
/* E9: USB OverCurrent 0 */
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
/* E10: Not Connected */

2
src/mainboard/starlabs/starbook/variants/adl/gpio.c
View file

@ -255,7 +255,7 @@ const struct pad_config gpio_table[] = {
/* E7: Embedded Controller SMI */
PAD_NC(GPP_E7, NONE),
/* E8: DRAM Sleep */
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_E8, 1, DEEP),
/* E9: USB OverCurrent 0 */
PAD_NC(GPP_E9, NONE),
/* E10: PWD Amplifier Input */

2
src/mainboard/starlabs/starbook/variants/adl_n/gpio.c
View file

@ -255,7 +255,7 @@ const struct pad_config gpio_table[] = {
/* E7: Embedded Controller SMI */
PAD_NC(GPP_E7, NONE),
/* E8: DRAM Sleep */
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF2),
PAD_CFG_GPO(GPP_E8, 1, DEEP),
/* E9: USB OverCurrent 0 */
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
/* E10: PWD Amplifier Input */

2
src/mainboard/starlabs/starbook/variants/rpl/gpio.c
View file

@ -255,7 +255,7 @@ const struct pad_config gpio_table[] = {
/* E7: Embedded Controller SMI */
PAD_NC(GPP_E7, NONE),
/* E8: DRAM Sleep */
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_E8, 1, DEEP),
/* E9: USB OverCurrent 0 */
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
/* E10: PWD Amplifier Input */

2
src/mainboard/starlabs/starfighter/variants/rpl/gpio.c
View file

@ -260,7 +260,7 @@ const struct pad_config gpio_table[] = {
/* E7: Embedded Controller SMI */
PAD_NC(GPP_E7, NONE),
/* E8: DRAM Sleep */
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF1),
PAD_CFG_GPO(GPP_E8, 1, DEEP),
/* E9: USB OverCurrent 0 */
PAD_CFG_NF(GPP_E9, NONE, DEEP, NF1),
/* E10: Not Connected */

2
src/mainboard/starlabs/starlite_adl/variants/mk_v/gpio.c
View file

@ -254,7 +254,7 @@ const struct pad_config gpio_table[] = {
/* E7: Embedded Controller SMI */
PAD_NC(GPP_E7, NONE),
/* E8: DRAM Sleep */
PAD_CFG_NF(GPP_E8, NONE, DEEP, NF2),
PAD_CFG_GPO(GPP_E8, 1, DEEP),
/* E9: USB OverCurrent 0 */
PAD_NC(GPP_E9, NONE),
/* E10: PWD Amplifier Input */