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UPSTREAM: soc/intel/quark: Reformat include/soc/pci_devs.h

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Replace # define with #define
Align the right hand column to prepare for further expansion

TEST=Build and run on Galileo Gen2

Change-Id: Ie4d9fb56d52d7291be5523d31c1d3aa51f94dcd6
Original-Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com>
Original-Reviewed-on: https://review.coreboot.org/14879
Original-Reviewed-by: Martin Roth <martinroth@google.com>
(cherry-picked from commit 76684bf75b)
Signed-off-by: Martin Roth <martinroth@chromium.org>
Reviewed-on: https://chromium-review.googlesource.com/346525
Commit-Ready: Stefan Reinauer <reinauer@google.com>
Tested-by: Stefan Reinauer <reinauer@google.com>
Reviewed-by: Stefan Reinauer <reinauer@google.com>
This commit is contained in:
Lee Leahy 2016-05-17 10:03:16 -07:00 • committed by chrome-bot
commit a70d845f38
1 changed files with 9 additions and 6 deletions
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15
src/soc/intel/quark/include/soc/pci_devs.h
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@ -23,19 +23,22 @@
#include <soc/QuarkNcSocId.h>
/* DEVICE 0 (Memroy Controller Hub) */
#define MC_BDF PCI_DEV(PCI_BUS_NUMBER_QNC, MC_DEV, MC_FUN)
#define MC_BDF PCI_DEV(PCI_BUS_NUMBER_QNC, MC_DEV, MC_FUN)
/* Device IDs */
#define HSUART_DEVID 0x0936
#define EHCI_DEVID 0x0939
/* IO Fabric 1 */
#define SIO1_DEV 0x14
# define HSUART1_DEV SIO1_DEV
# define HSUART1_FUNC 5
#define SIO1_DEV 0x14
#define HSUART1_DEV SIO1_DEV
#define HSUART1_FUNC 5
/* Platform Controller Unit */
# define LPC_DEV_FUNC PCI_DEVFN(PCI_DEVICE_NUMBER_QNC_LPC, \
PCI_FUNCTION_NUMBER_QNC_LPC)
#define LPC_DEV_FUNC PCI_DEVFN(PCI_DEVICE_NUMBER_QNC_LPC, \
PCI_FUNCTION_NUMBER_QNC_LPC)
#define LPC_BDF PCI_DEV(PCI_BUS_NUMBER_QNC, \
PCI_DEVICE_NUMBER_QNC_LPC, \
PCI_FUNCTION_NUMBER_QNC_LPC)
#endif /* _QUARK_PCI_DEVS_H_ */