From a6e77b1e646e9f63dd339a977a3384194ba8862c Mon Sep 17 00:00:00 2001 From: Ivy Jian Date: Tue, 3 Feb 2026 14:52:09 +0800 Subject: [PATCH] mb/google/fatcat/kinmen: Remove RTD3 config for SSD The Kinmen hardware design does not have a power load switch for the SSD. Without it, the platform cannot cut off the main power rail to the device to enter D3cold. Therefore, remove the RTD3 chip driver and its associated GPIO configurations (enable/reset) in the overridetree to align with the hardware capability. The system will support D3hot instead of D3cold. BUG=460038237 TEST=Build and boot to OS on Kinmen, verify SSD still functions correctly and power state transitions align with HW design. Change-Id: I5e20c247bd45427f817e7afd8355a71c7a9c161c Signed-off-by: Ivy Jian Reviewed-on: https://review.coreboot.org/c/coreboot/+/91085 Tested-by: build bot (Jenkins) Reviewed-by: Pranava Y N Reviewed-by: Subrata Banik --- .../google/fatcat/variants/kinmen/overridetree.cb | 7 ------- 1 file changed, 7 deletions(-) diff --git a/src/mainboard/google/fatcat/variants/kinmen/overridetree.cb b/src/mainboard/google/fatcat/variants/kinmen/overridetree.cb index 36a7c30d09..bee842d0b4 100644 --- a/src/mainboard/google/fatcat/variants/kinmen/overridetree.cb +++ b/src/mainboard/google/fatcat/variants/kinmen/overridetree.cb @@ -374,13 +374,6 @@ chip soc/intel/pantherlake .clk_req = 1, .flags = PCIE_RP_CLK_REQ_DETECT | PCIE_RP_LTR | PCIE_RP_AER, }" - chip soc/intel/common/block/pcie/rtd3 - register "is_storage" = "true" - register "enable_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_HIGH(GPP_B16)" - register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_E03)" - register "srcclk_pin" = "1" - device generic 0 on end - end end # Gen5 M.2 SSD device ref cnvi_wifi on chip drivers/wifi/generic