From a65e94d6a178958454c7795e8a89a7ac09ec0290 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Micha=C5=82=20Kope=C4=87?= Date: Mon, 10 Mar 2025 14:37:49 +0100 Subject: [PATCH] mb/novacustom/mtl-h/romstage.c: Set Loadline FSP UPDs MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Set AC / DC Load Line params. The values were dumped from original Clevo Insyde UEFI firmware, version 1.07.02 Change-Id: I4cf729fc55ed6f2722606f393b6aa45afe396a6e Signed-off-by: Michał Kopeć Reviewed-on: https://review.coreboot.org/c/coreboot/+/86787 Reviewed-by: Michał Żygowski Tested-by: build bot (Jenkins) --- src/mainboard/novacustom/mtl-h/romstage.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/mainboard/novacustom/mtl-h/romstage.c b/src/mainboard/novacustom/mtl-h/romstage.c index 8fdd9eca61..3eb1dca329 100644 --- a/src/mainboard/novacustom/mtl-h/romstage.c +++ b/src/mainboard/novacustom/mtl-h/romstage.c @@ -27,5 +27,12 @@ void mainboard_memory_init_params(FSPM_UPD *mupd) }, }; + mupd->FspmConfig.AcLoadline[0] = 190; + mupd->FspmConfig.AcLoadline[1] = 310; + mupd->FspmConfig.AcLoadline[2] = 490; + mupd->FspmConfig.DcLoadline[0] = 190; + mupd->FspmConfig.DcLoadline[1] = 310; + mupd->FspmConfig.DcLoadline[2] = 490; + memcfg_init(mupd, &mem_config, &dimm_module_spd_info, half_populated); }