diff --git a/src/soc/nvidia/tegra124/pmc.h b/src/soc/nvidia/tegra124/pmc.h
index 72fdda50d2..2dfdaadb60 100644
--- a/src/soc/nvidia/tegra124/pmc.h
+++ b/src/soc/nvidia/tegra124/pmc.h
@@ -244,7 +244,9 @@ struct tegra_pmc_regs {
 	u32 cntrl2;
 	u8 _rsv3[0x18];
 	u32 io_dpd3_req;
-	u8 _rsv4[0x1a0];
+	u32 io_dqd3_status;
+	u32 strapping_opt_a;
+	u8 _rsv4[0x198];
 	u32 scratch56;
 	u32 scratch57;
 	u32 scratch58;
@@ -378,4 +380,10 @@ enum {
 		0x3f << PMC_OSC_EDPD_OVER_XOFS_SHIFT
 };
 
+enum {
+	PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT = 4,
+	PMC_STRAPPING_OPT_A_RAM_CODE_MASK =
+		0xf << PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT,
+};
+
 #endif	/* _TEGRA124_PMC_H_ */
diff --git a/src/soc/nvidia/tegra124/sdram.c b/src/soc/nvidia/tegra124/sdram.c
index 2bf240d370..283cbf4998 100644
--- a/src/soc/nvidia/tegra124/sdram.c
+++ b/src/soc/nvidia/tegra124/sdram.c
@@ -601,3 +601,11 @@ void sdram_init(const struct sdram_params *param)
 	sdram_enable_arbiter(param);
 	sdram_lock_carveouts(param, mc);
 }
+
+uint32_t sdram_get_ram_code(void)
+{
+	struct tegra_pmc_regs *pmc = (struct tegra_pmc_regs*)TEGRA_PMC_BASE;
+	return ((readl(&pmc->strapping_opt_a) &
+		 PMC_STRAPPING_OPT_A_RAM_CODE_MASK) >>
+		PMC_STRAPPING_OPT_A_RAM_CODE_SHIFT);
+}
diff --git a/src/soc/nvidia/tegra124/sdram.h b/src/soc/nvidia/tegra124/sdram.h
index 2672376578..cf5761c236 100644
--- a/src/soc/nvidia/tegra124/sdram.h
+++ b/src/soc/nvidia/tegra124/sdram.h
@@ -22,6 +22,7 @@
 
 #include "sdram_param.h"
 
+uint32_t sdram_get_ram_code(void);
 void sdram_init(const struct sdram_params *param);
 
 #endif /* __SOC_NVIDIA_TEGRA124_SDRAM_H__ */