mb/siemens/mc_apl1: Enable HDA in devicetree for all mainboard variants

With commit
'4074ce0cc7 (intel/apollolake: Add HDA to disable_dev function)'
FSP is now requested to switch off HDA PCI device if it is disabled in
devicetree. Doing so results in a warm restart. Normally this event
will be stored in CMOS RAM (if the descriptor is configured to do so)
and therefore no further resets are requested by FSP on the next boots
as long as CMOS RAM is kept alive.

The Siemens mainboards based on Apollo Lake do not have a CMOS battery
and therefore the CMOS is not backed up. This leads to reset requests
from FSP after PCI enumeration on every boot. To avoid this reset enable
HDA in devicetree for these mainboards. Though we do not have any usage
of HDA it should not be an issue that the HDA device is now enabled. The
benefit is though that no reset is requested anymore by FSP.

Change-Id: I637c7c01d73350700c6066fee74fecbb5b93b221
Signed-off-by: Werner Zeh <werner.zeh@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/32295
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-by: Uwe Poeche <uwe.poeche@siemens.com>
Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

src/mainboard/siemens/mc_apl1/variants/mc_apl1/devicetree.cb

@@ -68,7 +68,7 @@ chip soc/intel/apollolake
 		device pci 0d.1 off end	# - PMC
 		device pci 0d.2 on  end	# - SPI
 		device pci 0d.3 off end	# - Shared SRAM
-		device pci 0e.0 off end	# - Audio
+		device pci 0e.0 on  end	# - Audio
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on  end	# - SATA
 		device pci 13.0 on  end	# - RP 2 - PCIe A 0 - MACPHY

src/mainboard/siemens/mc_apl1/variants/mc_apl2/devicetree.cb

@@ -60,7 +60,7 @@ chip soc/intel/apollolake
 		device pci 0d.1 off end	# - PMC
 		device pci 0d.2 on  end	# - SPI
 		device pci 0d.3 off end	# - Shared SRAM
-		device pci 0e.0 off end	# - Audio
+		device pci 0e.0 on  end	# - Audio
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on  end	# - SATA
 		device pci 13.0 on  end	# - RP 2 - PCIe A 0

src/mainboard/siemens/mc_apl1/variants/mc_apl3/devicetree.cb

@@ -56,7 +56,7 @@ chip soc/intel/apollolake
 		device pci 0d.1 off end	# - PMC
 		device pci 0d.2 on  end	# - SPI
 		device pci 0d.3 off end	# - Shared SRAM
-		device pci 0e.0 off end	# - Audio
+		device pci 0e.0 on  end	# - Audio
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on  end	# - SATA
 		device pci 13.0 on  end	# - RP 2 - PCIe A 0

src/mainboard/siemens/mc_apl1/variants/mc_apl4/devicetree.cb

@@ -57,7 +57,7 @@ chip soc/intel/apollolake
 		device pci 0d.1 off end	# - PMC
 		device pci 0d.2 on  end	# - SPI
 		device pci 0d.3 off end	# - Shared SRAM
-		device pci 0e.0 off end	# - Audio
+		device pci 0e.0 on  end	# - Audio
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on  end	# - SATA
 		device pci 13.0 on  end	# - RP 2 - PCIe A 0

src/mainboard/siemens/mc_apl1/variants/mc_apl5/devicetree.cb

@@ -59,7 +59,7 @@ chip soc/intel/apollolake
 		device pci 0d.1 off end	# - PMC
 		device pci 0d.2 on  end	# - SPI
 		device pci 0d.3 off end	# - Shared SRAM
-		device pci 0e.0 off end	# - Audio
+		device pci 0e.0 on  end	# - Audio
 		device pci 11.0 on  end	# - ISH
 		device pci 12.0 on  end	# - SATA
 		device pci 13.0 on  end	# - RP 2 - PCIe A 0